* WARNING : please consider following remarks before usage
*
* 1) All models are a tradeoff between accuracy and complexity (ie. simulation 
*    time).
* 2) Macromodels are not a substitute to breadboarding, they rather confirm the
*    validity of a design approach and help to select surrounding component values.
*
* 3) A macromodel emulates the NOMINAL performance of a TYPICAL device within 
*    SPECIFIED OPERATING CONDITIONS (ie. temperature, supply voltage, etc.).
*    Thus the macromodel is often not as exhaustive as the datasheet, its goal
*    is to illustrate the main parameters of the product.
*
* 4) Data issued from macromodels used outside of its specified conditions
*    (Vcc, Temperature, etc) or even worse: outside of the device operating 
*    conditions (Vcc, Vicm, etc) are not reliable in any way.


************************* TD310 ****************
.SUBCKT TD310 20 INA INB INC INEN OUTALARM OUTAO INAOP
+ INPSENSE INAOM INMSENSE 10 OUTC OUTB OUTA UVLOSTDB
******************** connection du 0 ***********
.SUBCKT CONNECT 20 
RCONNECT 20 0 1E+12
.ENDS CONNECT
******************* input **********************
.SUBCKT INPUT 20 10 IN OUT
.MODEL DIDEAL D N=0.1 IS=1E-08
RIN1 IN 10 1E+12
RIN3 INB 10 1E+12
VDEC IN INA 1.1V
EDEC INA INB OUT 10 1.33E-02
DINP OUT 20 DIDEAL 400E-12
DINN 10 OUT DIDEAL 400E-12
GIN 10 OUT 10 INB 7.2E-08
CINP OUT 20 1FF
*CINN OUT 10 0.1FF
.ENDS INPUT
**************** output *******************
.SUBCKT OUTPUT 20 10 IN OUT
.MODEL DIDEAL D N=0.1 IS=1E-08
DP 20 2 DIDEAL 400E-12
DN 4 10 DIDEAL 400E-12
RONP 1 OUTA 4.5
RONN OUTA 3 6.5
EP 2 1 IN 10 2
EN 3 4 20 IN 2
RIN1 IN 10 1E+12
RIN2 IN 10 1E+12
RPULUP1 OUTA 10 47K
VSUIV OUT OUTA 0V 
VLIMP 6 20 225
HLIMP 5 6 VSUIV 150
DLIMP OUTA 5 DIDEAL 400E-12
VLIMN 10 8 120
HLIMN 7 8 VSUIV 150
DLIMN 7 OUTA DIDEAL 400E-12
.ENDS OUTPUT
**************** nand3 *******************
.SUBCKT NAND3 20 10 INA INB INC OUT
.MODEL DIDEAL D N=0.1 IS=1E-08
RP1 20 15 1E+09
RN1 15 10 1E+09
RP2 20 18 0.2E+09
RN2 18 10 0.8E+09
RINA INA 10 1E+12
RIPA INA 20 1E+12
RINB INB 10 1E+12
RIPB INB 20 1E+12
RINC INC 10 1E+12
RIPC INC 20 1E+12
DPET1 OUTA 20 DIDEAL 400E-12
DNET1 10 OUTA DIDEAL 400E-12
GET1 10 OUTA INA 15 6.7E-08
CP1 OUTA 20 0.05FF
CN1 OUTA 10 0.05FF
DPET2 OUTB 20 DIDEAL 400E-12
DNET2 10 OUTB DIDEAL 400E-12
GET2 10 OUTB INB 15 6.7E-08
CP2 OUTB 20 0.05FF
CN2 OUTB 10 0.05FF
DPET3 OUTC 20 DIDEAL 400E-12
DNET3 10 OUTC DIDEAL 400E-12
GET3 10 OUTC INC 15 6.7E-08
CP3 OUTC 20 0.05FF
CN3 OUTC 10 0.05FF
EOUT3 SOM 2 OUTC 10 0.33333
EOUT2 2 1 OUTB 10 0.33333
EOUT1 1 10 OUTA 10 0.33333
ROUT SOM 10 1E+12
DPOUT OUT 20 DIDEAL 400E-12
DNOUT 10 OUT DIDEAL 400E-12
GOUT 10 OUT SOM 18 -6.7E-08
CPOUT OUT 20 0.05FF
CNOUT OUT 10 0.05FF
.ENDS NAND3
**************** nand2 *******************
.SUBCKT NAND2 20 10 INA INB OUT
.MODEL DIDEAL D N=0.1 IS=1E-08
RP1 20 15 1E+09
RN1 15 10 1E+09
RP2 20 18 0.25E+09
RN2 18 10 0.75E+09
RINA INA 10 1E+12
RIPA INA 20 1E+12
RINB INB 10 1E+12
RIPB INB 20 1E+12
DPET1 OUTA 20 DIDEAL 400E-12
DNET1 10 OUTA DIDEAL 400E-12
GET1 10 OUTA INA 15 6.7E-08
CP1 OUTA 20 0.05FF
CN1 OUTA 10 0.05FF
DPET2 OUTB 20 DIDEAL 400E-12
DNET2 10 OUTB DIDEAL 400E-12
GET2 10 OUTB INB 15 6.7E-08
CP2 OUTB 20 0.05FF
CN2 OUTB 10 0.05FF
EOUT2 SOM 1 OUTB 10 0.5
EOUT1 1 10 OUTA 10 0.5
ROUT SOM 10 1E+12
DPOUT OUT 20 DIDEAL 400E-12
DNOUT 10 OUT DIDEAL 400E-12
GOUT 10 OUT SOM 18 -6.7E-08
CPOUT OUT 20 0.05FF
CNOUT OUT 10 0.05FF
.ENDS NAND2
**************** and2 *******************
.SUBCKT AND2 20 10 INA INB OUT
.MODEL DIDEAL D N=0.1 IS=1E-08
RP1 20 15 1E+09
RN1 15 10 1E+09
RP2 20 18 0.25E+09
RN2 18 10 0.75E+09
RINA INA 10 1E+12
RIPA INA 20 1E+12
RINB INB 10 1E+12
RIPB INB 20 1E+12
DPET1 OUTA 20 DIDEAL 400E-12
DNET1 10 OUTA DIDEAL 400E-12
GET1 10 OUTA INA 15 6.7E-08
CP1 OUTA 20 0.05FF
CN1 OUTA 10 0.05FF
DPET2 OUTB 20 DIDEAL 400E-12
DNET2 10 OUTB DIDEAL 400E-12
GET2 10 OUTB INB 15 6.7E-08
CP2 OUTB 20 0.05FF
CN2 OUTB 10 0.05FF
EOUT2 SOM 1 OUTB 10 0.5
EOUT1 1 10 OUTA 10 0.5
ROUT SOM 10 1E+12
DPOUT OUT 20 DIDEAL 400E-12
DNOUT 10 OUT DIDEAL 400E-12
GOUT 10 OUT SOM 18 6.7E-08
CPOUT OUT 20 0.05FF
CNOUT OUT 10 0.05FF
.ENDS AND2
*************** nand2S  *******************
*** c'est un nand2 avec l'entree B inversee ***
.SUBCKT NAND2S 20 10 INA INB OUT
.MODEL DIDEAL D N=0.1 IS=1E-08
RP1 20 15 1E+09
RN1 15 10 1E+09
RP2 20 18 0.25E+09
RN2 18 10 0.75E+09
RINA INA 10 1E+12
RIPA INA 20 1E+12
RINB INB 10 1E+12
RIPB INB 20 1E+12
DPET1 OUTA 20 DIDEAL 400E-12
DNET1 10 OUTA DIDEAL 400E-12
GET1 10 OUTA INA 15 6.7E-08
CP1 OUTA 20 0.05FF
CN1 OUTA 10 0.05FF
DPET2 OUTB 20 DIDEAL 400E-12
DNET2 10 OUTB DIDEAL 400E-12
GET2 10 OUTB INB 15 -6.7E-08
CP2 OUTB 20 0.05FF
CN2 OUTB 10 0.05FF
EOUT2 SOM 1 OUTB 10 0.5
EOUT1 1 10 OUTA 10 0.5
ROUT SOM 10 1E+12
DPOUT OUT 20 DIDEAL 400E-12
DNOUT 10 OUT DIDEAL 400E-12
GOUT 10 OUT SOM 18 -6.7E-08
CPOUT OUT 20 0.05FF
CNOUT OUT 10 0.05FF
.ENDS NAND2S
**************** securite  *******************
.SUBCKT SECUR 20 10 OUT
.MODEL DIDEAL D N=0.1 IS=1E-08
VSECUR 15 10 3.7V
RSECUR 15 10 1E+12
DPSECUR OUT 20 DIDEAL 400E-12
DNSECUR 10 OUT DIDEAL 400E-12
GSECUR 10 OUT 20 15 6.7E-08
CPSECUR OUT 20 0.1FF
CNSECUR OUT 10 0.1FF
.ENDS SECUR
**************** tempo *******************
.SUBCKT TEMPO 20 10 IN OUT
.MODEL DIDEAL D N=0.1 IS=1E-08
RIN IN 10 1E+12
RIP IN 20 1E+12
ICHARGE 20 OUT 0.0845U
DLIMIT OUT 20 DIDEAL 400E-12
CAI OUT 10 11.25PF
DN 4 10 DIDEAL 400E-12
RONN OUT 3 23
EN 3 4 20 IN 2
DLIM 10 OUT DIDEAL 400E-12
.ENDS TEMPO
******************* alarme ****************
.SUBCKT ALARM 20 10 IN OUT
.MODEL DIDEAL D N=0.1 IS=1E-08
RIN IN 10 1E+12
RIP IN 20 1E+12
CIN IN 10 1FF
CIP IN 20 1FF
DN 4 10 DIDEAL 400E-12
RONN OUTA 3 23
EN 3 4 20 IN 2
RFUITE OUTA 10 1.5E+09
VSUIV OUT OUTA 0V
VLIMN 10 8 350
HLIMN 7 8 VSUIV 1500
DLIMN 7 OUTA DIDEAL 400E-12
.ENDS ALARM
****************** hysteresis ************
.SUBCKT HYST 20 10 INP INM OUT
.MODEL DIDEAL D N=0.1 IS=1E-08
RINA INP 10 1E+12
RIPA INP 20 1E+12
RINB INM 10 1E+12
RIPB INM 20 1E+12
RINBIS INMBIS 10 1E+12
RIPBIS INMBIS 20 1E+12
EDEC INMBIS INM OUT 10 6.6666E-03
DPHYST OUT 20 DIDEAL 400E-12
DNHYST 10 OUT DIDEAL 400E-12
GHYST 10 OUT INP INMBIS -6.7E-07
CPHYST OUT 20 0.1FF
CNHYST OUT 10 0.1FF
.ENDS HYST
****************** differentiel **********
.SUBCKT DIFF 20 10 INP INM OUT
.MODEL DIDEAL D N=0.1 IS=1E-08
RINA INP 10 1E+12
RIPA INP 20 1E+12
RINB INM 10 1E+12
RIPB INM 20 1E+12
DPDIFF OUT 20 DIDEAL 400E-12
DNDIFF 10 OUT DIDEAL 400E-12
GDIFF 10 OUT INP INM -6.7E-07
CPDIFF OUT 20 3.6FF
CNDIFF OUT 10 3.6FF
.ENDS DIFF
**************** entree standby  *******************
.SUBCKT STDBY 20 10 IN OUT
.MODEL DIDEAL D N=0.1 IS=1E-08
VSTDBY 15 10 0.7V
RSTDBY 15 10 1E+12
RSTDBYP 20 16 1E+08
RSTDBYN 10 16 1E+08
RINA IN 10 1E+12
RIPA IN 20 1E+12
DPSTDBYA OUTA 20 DIDEAL 400E-12
DNSTDBYA 10 OUTA DIDEAL 400E-12
GSTDBYA 10 OUTA IN 15 6.7E-07
CPSTDBYA OUTA 20 80FF !introduit un retard de 5us sous 15V
CNSTDBYA OUTA 10 80FF
RINB OUTA 10 1E+12
RIPB OUTA 20 1E+12
DPSTDBYB OUT 20 DIDEAL 400E-12
DNSTDBYB 10 OUT DIDEAL 400E-12
GSTDBYB 10 OUT OUTA 16 6.7E-07
*CPSTDBYB OUT 20 10FF
*CNSTDBYB OUT 10 10FF
.ENDS STDBY
******************* pont diviseur ********
.SUBCKT PONT 20 10 OUT 
.SUBCKT DIODE TOP BOT !modelise un NMOS de 30/30 monte en diode
.MODEL DIDEAL1 D N=2 IS=1E-06
D1 TOP A DIDEAL1 13000E-12
R1 A BOT 150K
D2 TOP B DIDEAL1 13000E-12
R2 B BOT 150K
.MODEL DIDEAL2 D N=2 IS=1E-08
D3 TOP C DIDEAL2 400E-12
R3 C BOT 150K
D4 TOP D DIDEAL2 400E-12
R4 D BOT 150K
.ENDS DIODE
X1 20 21 DIODE
X2 21 22 DIODE
X3 22 23 DIODE
X4 23 24 DIODE
X5 24 25 DIODE
X6 25 26 DIODE
X7 26 27 DIODE
X8 27 28 DIODE
X9 28 OUT DIODE
X10 OUT 10 DIODE
.ENDS PONT
******************* annul conso residuelle ********
.SUBCKT CONSO 20 10 IN
.MODEL DIDEAL D N=0.1 IS=1E-08
************************* RVAR *************************
.SUBCKT RVAR VCOM 10 IN OUT
VSENS0 IN 1 0V
R0 1 OUT 2617.6
F0 1 OUT POLY(2) VSENS0 VSENS2 0 0 0 0 -0.3335E+09
VSENS2 VCOM 2 0V
R2 2 10 1E+09
.ENDS RVAR
XRCONSO 20 10 20 15 RVAR
DCONSO 15 14 DIDEAL 400E-12 
ESWITCH 14 10 20 IN 2 
GCONSO 20 10 IN 10 3.6333333E-05
* CONSO = 3.63E-05.VCC + VCC/RCONSO  avec RCONSO = 2617.6*(1+0.333 * VCC)
ICONSOSTDB 20 10 3.63U
RCONSOSTDB 20 10 916674  ! CONSO = 3.63U + Vcc / 916674 - 2UA a 4V = 6UA
.ENDS CONSO              !                              + 10UA a 15V = 30UA	
****************** bandgap *************
.SUBCKT BG 20 10 OUT 
VBG OUT 10 1.2V
RBGN OUT 10 1E+09
RBGP OUT 20 1E+09
.ENDS BG
**************** chaine d'entree **********
.SUBCKT CHAINE 20 10 IN OUTEN OUTUV OUTSEC OUT
XENTREE 20 10 IN OUTENTR INPUT
XNAND3 20 10 OUTENTR OUTEN OUTUV OUTNA NAND3
XNAND2S 20 10 OUTSEC OUTNA OUTAN NAND2S
XOUT 20 10 OUTAN OUT OUTPUT
.ENDS CHAINE
** CONNECTIONS :
* 1 INVERTING INPUT
* 2 NON-INVERTING INPUT
* 3 OUTPUT
* 4 POSITIVE POWER SUPPLY
* 5 NEGATIVE POWER SUPPLY
*.SUBCKT AMPLI 1 3 2 4 5 (analog)
.SUBCKT AMPLI 1 3 2 4 5 
**********************************************************
.MODEL MDTH D IS=1E-8 KF=7.405288E-15 CJO=10F
* INPUT STAGE
CIP 2 5 1.000000E-12
CIN 1 5 1.000000E-12
EIP 10 5 2 5 1
EIN 16 5 1 5 1
RIP 10 11 5.200000E+01
RIN 15 16 5.200000E+01
RIS 11 15 1.337376E+02
DIP 11 12 MDTH 400E-12
DIN 15 14 MDTH 400E-12
VOFP 12 13 DC 0.000000E+00
VOFN 13 14 DC 0
IPOL 13 5 5.000000E-06
CPS 11 15 7.175351E-10
DINN 17 13 MDTH 400E-12
VIN 17 5 -0.5000000e+00
DINR 15 18 MDTH 400E-12
VIP 4 18 1.600000E+00
*FCP 4 5 VOFP 2.900000E+01
*FCN 5 4 VOFN 2.900000E+01
* AMPLIFYING STAGE
FIP 5 19 VOFP 8.400000E+02
FIN 5 19 VOFN 8.400000E+02
RG1 19 5 2.212321E+06
RG2 19 4 2.212321E+06
CC 19 29 7.000000E-09
HZTP 30 29 VOFP 9.4E+03
HZTN  5 30 VOFN 9.4E+03
DOPM 19 22 MDTH 400E-12
DONM 21 19 MDTH 400E-12
HOPM 22 28 VOUT 2500
VIPM 28 4 150
HONM 21 27 VOUT 3750
VINM 5 27 150
EOUT 26 23 19 5 1
VOUT 23 5 0
ROUT 26 3 100
COUT 3 5 1.600000E-12
DOP 19 25 MDTH 400E-12
VOP 4 25 1.924208E+00
DON 24 19 MDTH 400E-12
VON 24 5 8.742083E-01
.ENDS AMPLI
************** circuit td300 **************
XCONNECT 20 CONNECT
XCHAINEA 20 10 INA OUTEN OUTUV OUTSEC OUTA CHAINE
XCHAINEB 20 10 INB OUTEN OUTUV OUTSEC OUTB CHAINE
XCHAINEC 20 10 INC OUTEN OUTUV OUTSEC OUTC CHAINE
XENABLE 20 10 INEN OUTEN INPUT
XTEMPO 20 10 INTEMPO OUTEMPO TEMPO
XSECUR 20 10 OUTSEC SECUR
XAND2 20 10 OUTHYST OUTEMPO OUTUV AND2
XSENSE 20 10 INPSENSE INMSENSE OUTSENSE DIFF
XNAND2 20 10 OUTSENSE OUTHYST INTEMPO NAND2
XNAND2S 20 10 OUTUV INTEMPO INALARM NAND2S
XALARM 20 10 INALARM OUTALARM ALARM
***XHYST 20 10 OUTBG OUTPONT OUTHYST HYST
XHYST 20 10 OUTBG UVLOSTDB OUTHYST HYST
XBG 20 10 OUTBG BG
***XPONT 20 10 OUTPONT PONT
XPONT 20 10 UVLOSTDB PONT
XAMPLI INAOM OUTAO INAOP 20 10 AMPLI
XCONSO 20 10 OUTSTDB CONSO
XSTDBY 20 10 UVLOSTDB OUTSTDB STDBY
.ENDS TD310