Version 4
SHEET 1 5945688 13421568
WIRE 1248 -512 1248 -528
WIRE 1248 -416 1248 -432
WIRE 1376 -528 1248 -528
WIRE 1440 -528 1376 -528
WIRE 1488 -608 1488 -640
WIRE 1488 -416 1488 -512
WIRE 1648 -640 1488 -640
WIRE 1648 -560 1648 -640
WIRE 1648 -416 1648 -480
WIRE 1696 -640 1648 -640
WIRE 1808 -640 1760 -640
WIRE 1808 -560 1808 -640
WIRE 1808 -416 1808 -480
FLAG 1248 -416 0
FLAG 1488 -416 0
FLAG 1808 -416 0
FLAG 1648 -416 0
FLAG 1376 -528 gate
SYMBOL nmos 1440 -608 R0
WINDOW 0 52 12 Left 0
WINDOW 3 52 80 Left 0
SYMATTR InstName M2
SYMATTR Value Si4410DY
SYMBOL voltage 1808 -576 R0
SYMATTR InstName V1
SYMATTR Value 15
SYMBOL bi2 1248 -512 R0
WINDOW 3 40 42 Left 0
WINDOW 39 23 80 Left 0
SYMATTR Value I=100u*(time > 0)
SYMATTR SpiceLine Rpar=1G
SYMATTR InstName B1
SYMBOL diode 1696 -624 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName D1
SYMBOL current 1648 -480 M180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
SYMATTR InstName I1
SYMATTR Value 10.
TEXT 1064 -392 Left 0 !.tran .6m
TEXT 1064 -344 Left 0 !.model D D(Ron=1u Roff=1T)
TEXT 1064 -368 Left 0 !.options maxstep=.1u
TEXT 1064 -320 Left 0 !.model Si4410DY VDMOS(Rd=3m Rs=3m Vto=2.6 Kp=60\n+ Cgdmax=1.9n Cgdmin=50p Cgs=3.1n Cjo=1n Is=5.5p\n+ Rb=5.7m mfg=Siliconix Vds=30 Ron=15m Qg=60n)