Version 4 SHEET 1 1024 1552 WIRE -224 240 -224 176 WIRE -224 480 -224 320 WIRE -80 176 -224 176 WIRE -80 624 -80 176 WIRE -48 176 -80 176 WIRE -32 624 -80 624 WIRE 144 624 48 624 WIRE 224 176 32 176 WIRE 240 624 144 624 WIRE 400 176 288 176 WIRE 400 272 400 176 WIRE 400 624 320 624 WIRE 400 624 400 336 WIRE 592 176 400 176 WIRE 768 176 592 176 WIRE 768 256 768 176 WIRE 768 624 400 624 WIRE 768 624 768 336 WIRE 768 656 768 624 FLAG -224 480 0 FLAG 768 656 0 FLAG 592 176 n002 FLAG 144 624 n021 SYMBOL voltage -224 224 R0 WINDOW 0 64 16 Center 0 WINDOW 123 24 132 Left 0 WINDOW 39 24 160 Left 0 SYMATTR InstName Source SYMATTR Value2 AC 1 SYMATTR SpiceLine Rser=0.1 SYMATTR Value "" SYMBOL res 48 160 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName ZA1 SYMATTR Value 50 SYMBOL res 752 240 R0 SYMATTR InstName R2 SYMATTR Value 50 SYMBOL FerriteBead2 256 176 R90 WINDOW 0 -9 0 VBottom 0 SYMATTR InstName L5 SYMATTR Value 2.58µ SYMATTR SpiceLine Ipk=0.05 Rser=0.8 Rpar=2054 Cpar=911f mfg="Wurth Elektronik eiSos" pn="742 792 693" SYMBOL res 64 608 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName ZA2 SYMATTR Value 50 SYMBOL res 336 608 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R10 SYMATTR Value 50 SYMBOL cap 384 272 R0 SYMATTR InstName C1 SYMATTR Value 2n2 SYMATTR SpiceLine Rser=0.159 Lser={ESL} TEXT -74 768 Left 0 !.ac oct 100 1E6 1E9 TEXT 64 32 Left 0 ;For modeling of insertion loss you have to simulate both cases: TEXT 56 64 Left 0 ;1) the filtered system with the selected Ferrite Bead (L5) =>V(n002) TEXT 176 96 Left 0 ;2) the unfiltered system without Ferrite Bead (n021) TEXT 48 128 Left 0 ;and then plot by (ALT+Double Click) expression: e.g. V(n002)/V(n021) TEXT -72 728 Left 0 !.step param ESL LIST 0.5n 1n 2n 10n TEXT -72 688 Left 0 ;Simulation of filter parameter changes by stepping ESL of filter cap