Version 4
SHEET 1 992 680
WIRE 304 32 272 32
WIRE 208 48 192 48
WIRE 192 96 192 48
WIRE -32 144 -48 144
WIRE -16 144 -32 144
WIRE 112 144 48 144
WIRE 320 144 272 144
WIRE 384 144 320 144
WIRE -16 176 -48 176
WIRE 112 192 96 192
WIRE 384 192 288 192
WIRE 96 256 96 192
WIRE 96 256 64 256
WIRE -32 272 -32 144
WIRE 0 272 -32 272
WIRE 192 336 192 240
WIRE 128 352 96 352
WIRE -48 416 -48 176
WIRE 320 416 320 144
WIRE 320 416 -48 416
FLAG -48 144 T
IOPIN -48 144 In
FLAG 384 144 Q
IOPIN 384 144 Out
FLAG 96 352 R
IOPIN 96 352 In
FLAG 384 192 Q\
IOPIN 384 192 Out
FLAG 304 32 S\
IOPIN 304 32 In
SYMBOL Digital\\dflop 192 96 R0
SYMATTR InstName A1
SYMATTR Value2 td={tdgate2} tripdt={tripdtgate} vhigh={vhighgate} vlow={vlowgate}
SYMBOL Digital\\xor 32 96 R0
SYMATTR InstName A2
SYMATTR Value2 td={tdgate} tripdt={tripdtgate} vhigh={vhighgate} vlow={vlowgate}
SYMBOL Digital\\buf 0 208 R0
SYMATTR InstName A3
SYMATTR Value2 td={tdgate} tripdt={tripdtgate} vhigh={vhighgate} vlow={vlowgate}
SYMBOL Digital\\buf 272 -32 M0
SYMATTR InstName A4
SYMATTR Value2 td={tdgate} tripdt={tripdtgate} vhigh={vhighgate} vlow={vlowgate}
SYMBOL Digital\\buf 128 288 R0
SYMATTR InstName A5
SYMATTR Value2 td={tdgate} tripdt={tripdtgate} vhigh={vhighgate} vlow={vlowgate}
TEXT -232 -72 Left 0 ;T S\\-R Flip-Flop from D Flip-Flop\nLast updated April 21, 2008\n \nUsed by 74HC193 circuit simulation
TEXT -296 440 Left 0 ;All gates assume a run-time .param statement be placed in circuits that call this component.\nExample: .param tdgate=10n tdgate2=3*tdgate tripdtgate=1n vhighgate=5v vlowgate=0v