Difference between revisions of "LTspice Genealogy - The Heritage of Simulation Ubiquity"

From LTwiki-Wiki for LTspice
m (2008: LTspice IV released)
Line 140: Line 140:
 
  Apr09: The data from a .step'ed .meas statements can now be reformatted to a .raw file and plotted  
 
  Apr09: The data from a .step'ed .meas statements can now be reformatted to a .raw file and plotted  
 
         (View=>SPICE Error Log then right button menu).
 
         (View=>SPICE Error Log then right button menu).
  Jul09: Reimplemented MOS levels 1, 2, and 3 to use the Yang-Chatterjee charge model instead of the Meyer capacitance model
+
  Jul09: Reimplemented MOS levels 1, 2, and 3 to use the Yang-Chatterjee charge model instead of the  
        and added warnings when using archaic MOS levels 1, 2, or 3 below reasonable dimensions.
+
        Meyer capacitance model and added warnings when using archaic MOS levels 1, 2, or 3 below  
 +
        reasonable dimensions.
 
  Sep10: The .op values can now be displayed on the schematic while plotting .ac or .noise data  
 
  Sep10: The .op values can now be displayed on the schematic while plotting .ac or .noise data  
 
         (schematic right button menu->View->Place .op Data Label).
 
         (schematic right button menu->View->Place .op Data Label).
  Dec11: The LTspice-Gummel-Poon now supports a parasitic PNP to accurately model the substrate behavior of a vertical NPN.   
+
  Dec11: The LTspice-Gummel-Poon now supports a parasitic PNP to accurately model the substrate  
 +
        behavior of a vertical NPN.   
 
  Mar13: Added a level 73 MOSFET: HiSIM-HV from Hiroshima University and STARC.
 
  Mar13: Added a level 73 MOSFET: HiSIM-HV from Hiroshima University and STARC.

Revision as of 23:08, 20 July 2013

1969: Beginnings of CANCER (Computer Analysis of Nonlinear Circuits, Excluding Radiation)

  • CANCER began as a derivative of a program that was the class project of a series of courses taught by Ron Rohrer with the approval and encouragement of Professor Donald O. Pederson
  • Larry Nagel wrote the netlist parser and the analysis core and was student group leader
  • Lynn Weber developed a noise analysis feature that utilized adjoint network techniques
  • Bob Berry wrote the sparse matrix LU decomposition package
  • CANCER project's key features:
    • Was the first circuit simulator to utilize sparse matrix techniques
    • Used Newton-Raphson iteration method heuristically modified for bipolar circuits
    • Utilized implicit integration to accommodate widely spread time-constants of an IC
    • Integrated DC operating point analysis, small-signal AC analysis and transient analysis
  • Project presented by Ron Rohrer at the 1971 ISSCC[1], but the code was considered partially proprietary and was never publicly released

1971: SPICE 1 (Simulation Program with IC Emphasis) - direct outgrowth of CANCER

  • Ron Rohrer leaves UC Berkeley and further development of CANCER (renamed SPICE) became Larry Nagel's Masters project with Don Pederson taking over as faculty advisor
  • KEY EVENT: Don Pederson insisted that all further work be releasable to the public domain
  • SPICE 1 release's key features:
    • Models for bipolar transistors were changed to Gummel-Poon equations
    • JFET and Shichman-Hodges MOSFET devices added (for Dave Hodges' MOSFET design class)
    • Fixed time step and strict Nodal Analysis (true voltage sources and inductors not supported)
    • DC, AC, Transient, Noise, and Sensitivity Analyses in the same program
    • Built-in models for diodes, bipolar transistors, MOSFETs, and JFETs
  • Was about 6k lines of FORTRAN at first informal limited public release in late 1971
  • Official public release was May 1972 with first formal paper presented by Don Pederson at the 16th Midwest Symposium on Circuit Theory, April 12, 1973
  • SPICE 1 becomes industry standard simulation tool running on large mainframe computers

1972: SPICE 2 begins

  • First version of SPICE 2 was Larry Nagel's Ph.D. project under Don Pederson
  • Modified Nodal Analysis (MNA) added, enabling voltage sources and inductors for the first time
  • Ellis Cohen added dynamic memory allocation
  • Adjustable time-step control added, greatly speeding most simulations
  • MOSFET and bipolar models overhauled and extended
  • Was about 8k lines of FORTRAN when first released to the public domain in late 1974
  • Larry Nagel departs for Bell Labs and his thesis becomes the de facto SPICE 2 Users Guide

1975: Journey to SPICE 2G6 (the pinnacle FORTRAN version)

  • Ellis Cohen becomes primary contributor with later help from Andrei Vladimirescu
  • First of a series of public revision releases after Nagel's version 2B begin in 1978
  • Along the way, sub circuits, poly sources and transmission lines are added
  • Version 2G6 ends up implementing three MOSFET models:
    • MOS 1 is a simplistic model described purely by ideal square-law I-V characteristics
    • MOS 2 is an analytical model, MOS 3 is a semi-empirical model and both include second-order effects such as channel length modulation, sub threshold conduction, scattering limited velocity saturation, small-size effects, and charge-controlled capacitances
  • 2G6 released to public domain in April 1983 (and is still available today from UC Berkeley)
  • Many current commercial simulators are based on SPICE 2G6

1983: SPICE 3 begins

  • Tom Quarles begins work, writing first version in RATFOR, a C-like preprocessor for FORTRAN
  • Was fully converted to C in 1985 with first early versions released in March of that year
  • Added models: MESFET, lossy transmission line and non-ideal switch
  • Arbitrary behavioral voltage and current sources added
  • Includes polynomial capacitors, inductors and voltage controlled sources
  • Allowed the use of alphabetical node labels rather than only numbers
  • Features a graphical interface for viewing results
  • New version eliminates many convergence problems
  • Added noise, distortion and pole-zero analysis, temperature sweeping, Monte Carlo and Fourier analysis
  • Not fully compatible with SPICE 2G6
  • Was about 135,000 lines of C code at first public release in 1989
  • Final version at Berkeley, SPICE 3F5, released to public in 1993
  • XSPICE was developed at Georgia Tech as an extension to the SPICE language to allow behavioral modeling of components
    • Drastically improve the speeds of mixed-mode and digital simulations

1984: PSpice (micro Processor SPICE)

  • Developed by MicroSim to run on the first IBM PC, initially released in January 1984
  • Was the first commercial offspring of Berkeley SPICE to run directly on the PC platform
  • Was the first SPICE program to gain wide acceptance in both industry and academia
  • KEY EVENT: A zero cost (but node-limited) student version is introduced in 1988
    • For the first time, SPICE becomes truly ubiquitous in the electrical engineering community
  • Evolved from Berkeley SPICE 2G, but added many proprietary enhancements
  • Probe, a waveform viewer module, was added when PC VGA graphics became available
  • Schematics, a graphical front end, was added much later sometime in the early 1990s

The Road To LTspice IV

  • 1991 DOS SwitcherCAD available from LTC (equation based)
  • 1992 First ever port to Linux of SPICE (3E2) publicaly released by Mike Engelhardt
  • 1994? Development at LTC of in-house advanced simulator begins based on Berkeley SPICE 3F4/5
    • Code extensively revised to improve performance on machines with faster processors than memory
    • Vastly improved convergence and time step control over that of Berkeley SPICE
    • Added support for important industry standard device, model and behavioral extensions
  • 1996 μPower SwitcherCAD available from LTC (simulation based)
  • Proprietary mixed-mode HDL capability added to LTC's in-house simulator
    • Efficiently handles extremely tight feedback between analog and digital sections
    • Greatly reduces node count in switched-mode IC macro models
  • 1998? SwitcherCAD released for internal review at LTC
    • Decision made to extend PSpice syntax recognition to simplify user support and ease of use with existing models

1999: LTspice/SwitcherCAD III first released to public

  • LTC's Field Application Engineers received the very first copies of LTspice in October
    • FAEs were then free to give LTspice to customers they met on a visit-by-visit basis
    • June 2001, now a web-based download, LTspice becomes widely publicized in trade journals and engineering forums
  • LTspice/SitcherCAD III key features:
    • Includes P-SPICE compatible semiconductor, device and syntax model extensions
      • Diode recombination current, bipolar quasi-saturation and JFET deep impact ionization
      • Behavioral modeling (legacy 2G6 POLY statements, arbitrary expressions, Laplace, and look-up tables)
    • Includes an original mixed mode simulator with native digital library (not X-SPICE based)
    • Inductors and capacitors come with extensive built-in parasitics available, yet don't cost any extra nodes
    • New arbitrary capacitance device (user inputs charge expression)
      • Is internally symbolically differentiated and then capacitance is integrated
    • Initial release extends MOSFET model support to BSIM 3.2.2 and BSIM 4.1 (BSIMPD 2.2 and EKV 2.6 followed shortly thereafter)
    • Also includes a native power VDMOS device model with integral nonlinear interelectrode capacitances
    • Waveform viewer with marching waveforms and dynamic waveform data compression
    • Built-in device library/database (includes many power MOSFETs, diodes, bipolars, JFETS and switch-mode controllers)
    • Built-in program update checker (bug fixes and feature additions available in near real time)

Important Follow-on Enhancements

  • KEY EVENT: In October 2001 the LTspice Yahoo users group is started by Ralph Reinhold
    • Within the first year Helmut Sennewald takes over as moderator organizing one of Yahoo's most successful technical forums
    • Includes over 30k members and rapidly approaching 100k messages (as of July 2013)
  • More noteworthy bullet points to be added here shortly (raw change log items are listed below)
Feb02: Added preliminary support for ddt(), idt(), and idtmod() analog behavioral functions.
May02: Implemented binning for all MOS and BSIM models.
May02: Wave file I/O capability added.
Jan03: Hierarchical schematics added.
Jan03: A graphical symbol editor was introduced.
Mar03: Keyboard short cuts are now user definable.
Jun03: Added an alternate solver (uses a 1/2x slower but >1000x more accurate sparse matrix package).
Jul03: Ability to export a netlist for PCB layout added.
Aug03: Implemented differential cross probing (drag the mouse between two wires).
Nov03: Probing of component instantaneous power dissipation added (alt-left click its symbol).
Jan04: Added the ability to annotate waveform plots with graphics and text.
Mar04: Windows meta file output support added. 
Apr04: Chan inductor, undocumented behavioral inductor revealed.
Dec04: Implemented .measure commands.
Feb05: .raw files can now be converted to a Fast Access format that allows new plot traces to be added.
Jun06: Added continuous derivative level 2 devices to the ideal diode and voltage controlled switch.
Nov07: There is now a diode instance parameter, N, that sets the number of devices in series.
Other: ako, param stepping, unlimited undo and redo, parametric (x-y) plotting, amp and power meters,
       Fourier analysis (both .four statements and FFT's of simulated data)

2008: LTspice IV released

  • "SwitcherCAD" is dropped from the name, simplifying the description and thereby emphasizing the general purpose nature of LTspice
  • Key features added to LTspice IV:
    • Multi-threaded solvers to better utilize current multi-core processors
    • New SPARSE matrix solvers that deploy self-authoring code
      • Code is assembled and linked on the fly
      • Approaches the theoretical flop limit of current FPU's
      • Large circuits run up to 3x faster on quad core processors
  • KEY EVENT: With 3+ million copies downloaded, LTspice becomes, by far, the de facto standard SPICE program
  • More noteworthy bullet points to be added here shortly (raw change log items are listed below)
Feb09: A symbol can now be automatically generated for a schematic.
Apr09: The data from a .step'ed .meas statements can now be reformatted to a .raw file and plotted 
       (View=>SPICE Error Log then right button menu).
Jul09: Reimplemented MOS levels 1, 2, and 3 to use the Yang-Chatterjee charge model instead of the 
       Meyer capacitance model and added warnings when using archaic MOS levels 1, 2, or 3 below 
       reasonable dimensions.
Sep10: The .op values can now be displayed on the schematic while plotting .ac or .noise data 
       (schematic right button menu->View->Place .op Data Label).
Dec11: The LTspice-Gummel-Poon now supports a parasitic PNP to accurately model the substrate 
       behavior of a vertical NPN.  
Mar13: Added a level 73 MOSFET: HiSIM-HV from Hiroshima University and STARC.