Version 4 SHEET 1 1684 1876 WIRE -64 -1056 -208 -1056 WIRE 176 -1056 160 -1056 WIRE 224 -1056 176 -1056 WIRE 256 -1056 224 -1056 WIRE 368 -1056 320 -1056 WIRE 464 -1056 448 -1056 WIRE 544 -1056 464 -1056 WIRE 656 -1056 544 -1056 WIRE 704 -1056 656 -1056 WIRE 544 -1040 544 -1056 WIRE 224 -1008 224 -1056 WIRE 656 -976 656 -1056 WIRE -64 -960 -96 -960 WIRE 544 -960 544 -976 WIRE 32 -896 32 -928 WIRE 32 -896 16 -896 WIRE 112 -864 112 -928 WIRE 112 -864 -192 -864 WIRE 224 -864 224 -944 WIRE 224 -864 112 -864 WIRE 544 -864 544 -896 WIRE 544 -864 224 -864 WIRE 656 -864 656 -896 WIRE 656 -864 544 -864 WIRE -192 -848 -192 -864 WIRE -96 -800 -96 -960 WIRE -32 -800 -96 -800 WIRE 96 -800 32 -800 WIRE -96 -720 -96 -800 WIRE -80 -720 -96 -720 WIRE 16 -720 -16 -720 WIRE 96 -720 96 -800 WIRE 96 -720 80 -720 WIRE 464 -672 464 -1056 WIRE 96 -592 96 -720 WIRE 464 -592 464 -608 WIRE 464 -592 96 -592 WIRE 464 -576 464 -592 WIRE 96 -528 96 -592 WIRE 96 -528 48 -528 WIRE -96 -512 -96 -720 WIRE -96 -512 -128 -512 WIRE -16 -512 -96 -512 WIRE 224 -496 48 -496 WIRE 224 -480 224 -496 WIRE 224 -368 224 -400 WIRE 464 -368 464 -512 WIRE 464 -368 224 -368 WIRE 464 -352 464 -368 WIRE -384 -64 -400 -64 WIRE 384 -64 -384 -64 WIRE 528 -64 480 -64 WIRE 592 -64 528 -64 WIRE 624 -64 592 -64 WIRE 704 -64 688 -64 WIRE 800 -64 784 -64 WIRE 880 -64 800 -64 WIRE 992 -64 880 -64 WIRE 1040 -64 992 -64 WIRE 880 -48 880 -64 WIRE 464 0 464 -16 WIRE 528 0 528 -64 WIRE 992 16 992 -64 WIRE 64 32 -144 32 WIRE 208 32 160 32 WIRE 304 32 208 32 WIRE 400 32 400 -16 WIRE 400 32 304 32 WIRE 880 32 880 16 WIRE -384 48 -384 -64 WIRE 304 48 304 32 WIRE 400 48 400 32 WIRE 64 80 16 80 WIRE 208 80 176 80 WIRE 240 80 208 80 WIRE 64 128 64 112 WIRE 256 128 224 128 WIRE 304 128 304 112 WIRE 304 128 256 128 WIRE 400 128 400 112 WIRE 400 128 304 128 WIRE -144 144 -144 32 WIRE 304 144 304 128 WIRE -384 240 -384 128 WIRE -144 240 -144 224 WIRE -144 240 -384 240 WIRE 304 240 304 208 WIRE 304 240 -144 240 WIRE 528 240 528 64 WIRE 528 240 304 240 WIRE 880 240 880 96 WIRE 880 240 528 240 WIRE 992 240 992 96 WIRE 992 240 880 240 WIRE -384 256 -384 240 WIRE 368 288 336 288 WIRE 400 288 368 288 WIRE 400 320 400 288 WIRE 16 336 16 80 WIRE 32 336 16 336 WIRE 368 336 96 336 WIRE 528 336 432 336 WIRE 656 336 528 336 WIRE 656 352 656 336 WIRE 144 368 96 368 WIRE 528 368 528 336 WIRE 80 400 80 384 WIRE 368 400 304 400 WIRE 464 400 432 400 WIRE 304 416 304 400 WIRE 144 448 144 368 WIRE 400 448 400 416 WIRE 528 448 528 432 WIRE 656 448 656 432 WIRE 800 512 800 -64 WIRE 464 528 464 400 WIRE 528 528 464 528 WIRE 656 528 592 528 WIRE 144 544 144 528 WIRE 464 608 464 528 WIRE 480 608 464 608 WIRE 576 608 544 608 WIRE 656 608 656 528 WIRE 656 608 640 608 WIRE 736 608 656 608 WIRE 800 608 800 576 WIRE 800 608 736 608 WIRE 656 736 656 608 WIRE 656 736 592 736 WIRE 464 752 464 608 WIRE 464 752 432 752 WIRE 528 752 464 752 WIRE 704 768 592 768 WIRE 704 784 704 768 WIRE 800 784 800 608 WIRE 704 896 704 864 WIRE 800 896 800 848 WIRE 800 896 704 896 WIRE 800 912 800 896 FLAG 1040 -64 OUT2 IOPIN 1040 -64 Out FLAG -400 -64 IN IOPIN -400 -64 In FLAG 432 752 Verr2 IOPIN 432 752 Out FLAG 592 -64 c2 FLAG 800 912 0 FLAG -384 256 0 FLAG 64 128 0 FLAG 144 544 0 FLAG 464 0 0 FLAG 80 400 0 FLAG 208 32 q FLAG 208 80 qb FLAG 256 128 LEB FLAG 528 448 0 FLAG 656 448 0 FLAG 304 416 0 FLAG 736 608 FDB FLAG 368 288 IN FLAG 400 448 0 FLAG 704 -1056 OUT1 IOPIN 704 -1056 Out FLAG -208 -1056 IN IOPIN -208 -1056 In FLAG -128 -512 Verr1 IOPIN -128 -512 Out FLAG 176 -1056 c FLAG 16 -896 Duty IOPIN 16 -896 Out FLAG 464 -352 0 FLAG -192 -848 0 SYMBOL ind2 688 -48 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 4 56 VBottom 0 SYMATTR InstName L1 SYMATTR Value 35µH SYMBOL res2 864 -48 R0 SYMATTR InstName Resr SYMATTR Value 70m SYMBOL cap 864 32 R0 SYMATTR InstName Cout SYMATTR Value 100µF SYMBOL voltage -384 32 R0 WINDOW 123 0 0 Left 0 WINDOW 39 24 132 Left 0 WINDOW 3 26 91 Left 0 SYMATTR Value 8.24V SYMATTR InstName V4 SYMBOL res2 544 592 R90 WINDOW 0 0 32 VBottom 0 WINDOW 3 32 32 VTop 0 SYMATTR InstName R1 SYMATTR Value 20k SYMBOL cap 640 592 R90 WINDOW 0 0 32 VBottom 0 WINDOW 3 32 32 VTop 0 SYMATTR InstName C1 SYMATTR Value 10nF SYMBOL cap 592 512 R90 WINDOW 0 0 32 VBottom 0 WINDOW 3 32 32 VTop 0 SYMATTR InstName C2 SYMATTR Value 470pF SYMBOL voltage 704 768 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2 SYMATTR Value 2.5V SYMBOL res2 624 -48 R270 WINDOW 0 32 32 VTop 0 WINDOW 3 0 32 VBottom 0 SYMATTR InstName R4 SYMATTR Value 20m SYMBOL res2 784 784 R0 SYMATTR InstName R8 SYMATTR Value 10k SYMBOL res2 784 512 R0 SYMATTR InstName R7 SYMATTR Value 10k SYMBOL current 992 16 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName I1 SYMATTR Value PULSE(0.13 0.3 4m 100u 100u 3.99m 8m) SYMBOL voltage -144 128 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 WINDOW 3 -193 145 Left 0 SYMATTR Value PULSE(0 15 0 10n 10n 100n 5u) SYMATTR InstName Vclock SYMBOL D 528 32 M180 WINDOW 0 32 30 Left 0 WINDOW 38 32 0 Left 0 WINDOW 3 32 -30 Left 0 SYMATTR InstName D1 SYMATTR SpiceModel DN SYMATTR Value N=0.01 SYMBOL SWITCH 432 -64 R270 WINDOW 0 76 -9 VRight 0 WINDOW 3 53 -24 VRight 0 SYMATTR InstName S1 SYMATTR Value PSW SYMBOL Digital\\srflop 112 -16 R0 SYMATTR InstName A2 SYMATTR Value2 Trise={Trise} Td={Td} Ref={Ref} Vhigh={Vhigh} Vlow={Vlow} Vh={Vh} Vt={Vt} SYMBOL voltage 144 432 M0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName Vreset SYMATTR Value PULSE(0 15 4.8u 10n 10n 50n 5u) SYMBOL Digital\\or 64 288 M0 SYMATTR InstName A1 SYMATTR Value2 Trise={Trise} Td={Td} Ref={Ref} Vhigh={Vhigh} Vlow={Vlow} Vh={Vh} Vt={Vt} SYMBOL res2 288 48 R0 SYMATTR InstName R2 SYMATTR Value 680 SYMBOL cap 288 144 R0 SYMATTR InstName C3 SYMATTR Value 100pF SYMBOL diode 384 112 M180 WINDOW 0 24 72 Left 0 WINDOW 3 24 0 Left 0 SYMATTR InstName D2 SYMATTR Value 1N4148 SYMBOL res2 512 368 R0 SYMATTR InstName R3 SYMATTR Value 1 SYMBOL bi2 656 352 R0 WINDOW 3 -119 -42 Left 0 SYMATTR Value I=if(V(LEB)>3, I(L1), 0) SYMATTR InstName B1 SYMBOL CMP-STD 368 368 M0 WINDOW 39 38 121 Right 0 SYMATTR SpiceLine hys=1m SYMATTR InstName X5 SYMBOL ind2 352 -1040 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 4 56 VBottom 0 SYMATTR InstName L2 SYMATTR Value 35µH SYMBOL res2 528 -1040 R0 SYMATTR InstName Resr1 SYMATTR Value 70m SYMBOL cap 528 -960 R0 SYMATTR InstName Cout1 SYMATTR Value 100µF SYMBOL res2 -16 -736 R90 WINDOW 0 0 32 VBottom 0 WINDOW 3 32 32 VTop 0 SYMATTR InstName R5 SYMATTR Value 20k SYMBOL cap 80 -736 R90 WINDOW 0 0 32 VBottom 0 WINDOW 3 32 32 VTop 0 SYMATTR InstName C4 SYMATTR Value 10nF SYMBOL cap 32 -816 R90 WINDOW 0 0 32 VBottom 0 WINDOW 3 32 32 VTop 0 SYMATTR InstName C5 SYMATTR Value 470pF SYMBOL voltage 224 -496 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V3 SYMATTR Value 2.5V SYMBOL res2 256 -1040 R270 WINDOW 0 32 32 VTop 0 WINDOW 3 0 32 VBottom 0 SYMATTR InstName R6 SYMATTR Value 20m SYMBOL res2 448 -576 R0 SYMATTR InstName R9 SYMATTR Value 10k SYMBOL res2 448 -672 R0 SYMATTR InstName R10 SYMATTR Value 10k SYMBOL current 656 -976 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName I2 SYMATTR Value PULSE(0.13 0.3 4m 100u 100u 3.99m 8m) SYMBOL BUCK-CCM-DCM-CM 80 -1008 R0 WINDOW 39 -143 -125 Left 0 SYMATTR SpiceLine L=35u Fsw=200k Ri=1 Se=100m SYMATTR InstName X2 SYMBOL cap 208 -1008 R0 SYMATTR InstName C6 SYMATTR Value 1pF SYMBOL Opamps\\opamp 16 -576 M0 WINDOW 0 3 -20 Right 0 WINDOW 39 24 9 Right 0 WINDOW 40 79 116 Right 0 SYMATTR InstName X3 SYMATTR SpiceLine Aol=1K SYMBOL Opamps\\opamp 560 688 M0 WINDOW 0 3 -20 Right 0 WINDOW 39 24 9 Right 0 WINDOW 40 79 116 Right 0 SYMATTR InstName X1 SYMATTR SpiceLine Aol=1K TEXT -424 920 Left 0 !.tran 0 20m TEXT -424 888 Left 0 !.lib opamp.sub TEXT -416 336 Left 0 ;(8.24V) TEXT -424 1000 Left 0 ;for netlist, see: D:\\OrCAD\\Chapitre2\\chapter2_1\\Chapter 2_1-PSpiceFiles\\test buck cycle-by-cycle CM\\test buck cycle-by-cycle CM.net (first run the simulation in OrCAD) TEXT 904 944 Left 0 !.model PSW SW(Ron=1m Roff=10meg Vt=7.5V Vh=-1V) TEXT 1152 728 Left 0 !.params Trise=10ns\n.params Td=20ns\n.params Ref=7.5\n.params Vhigh=15\n.params Vlow=0\n.params Vh=2\n.params Vt=7.5 TEXT -72 488 Left 0 ;99% duty clamp TEXT -424 960 Left 0 ;LEB = Leading Edge Blanking TEXT -416 856 Left 0 !.IC V(out2)=5V TEXT -64 -1160 Left 0 ;L=35u Fs=200k Ri=1 Se=100m TEXT -272 -1312 Left 0 ;Convergence problem isolated down to varicap model as a substitute for inductor current memory (page 158, starting from page 146)\nAfter fixing varicap, convergence errors isolated down to voltage oscillations crossing zero and used to divide some other expressions\nDivide by zero in expressions fixed with aditional limits on the affected expressions (see internal schematic of BUCK-CCM-DCM-CM)M\nFollowing Christhophe's advise, the whole capacitor was removed for average model used in transient simulations\nFor AC response, use BUCK-CCM-DCM-CM-AC mode; for transient response, use BUCK-CCM-DCM-CM (without resonant capacitor) TEXT 568 -640 Left 0 ;Ri = (Verr max abs)/(Ic max abs) = Verr/Ic (max)\nVerr = maximum internal amplitude of ramp refference\nIc max abs = absolute maximum switch current\nRi = hypothetical resistor used as current transductor\nHere Ri = 1 in order to have the real current coefficient = 1\nRi voltage dropp is the equivalent voltage of c current (page 154) TEXT -192 664 Left 0 ;Recommended SPICE Settings:\nIntegratiion = Gear\nSolver = Alternate RECTANGLE Normal -480 -160 1504 1024 RECTANGLE Normal -288 -1344 1312 -192