Version 4 SHEET 1 2580 1112 WIRE 128 -224 128 -240 WIRE 96 -208 80 -208 WIRE 224 -192 160 -192 WIRE 1072 -192 1072 -208 WIRE 96 -176 32 -176 WIRE 1040 -176 1024 -176 WIRE 1168 -160 1104 -160 WIRE 128 -144 128 -160 WIRE 1040 -144 960 -144 WIRE 1072 -112 1072 -128 WIRE 128 176 128 160 WIRE 96 192 80 192 WIRE 224 208 160 208 WIRE 32 224 32 -176 WIRE 96 224 32 224 WIRE 1056 240 1056 224 WIRE 128 256 128 240 WIRE 1024 256 1008 256 WIRE 1152 272 1088 272 WIRE 960 288 960 -144 WIRE 1024 288 960 288 WIRE 1056 320 1056 304 WIRE 32 400 32 224 WIRE 960 400 960 288 WIRE 960 400 32 400 WIRE 1008 400 1008 384 WIRE 1104 400 1104 384 WIRE 32 416 32 400 WIRE 1008 496 1008 480 WIRE 1104 496 1104 480 WIRE 32 512 32 496 FLAG 128 -240 +V FLAG 128 -144 -V FLAG 80 -208 0 FLAG 1104 496 0 FLAG 1008 496 0 FLAG 1008 384 +V FLAG 1104 384 -V FLAG 32 512 0 FLAG 128 160 +V FLAG 128 256 -V FLAG 80 192 0 FLAG 1056 224 +V FLAG 1056 320 -V FLAG 1008 256 0 FLAG 1072 -208 +V FLAG 1072 -112 -V FLAG 1024 -176 0 FLAG 224 -192 1 FLAG 224 208 2 FLAG 1152 272 3b FLAG 1168 -160 3a SYMBOL voltage 1008 384 R0 SYMATTR InstName V1 SYMATTR Value 15 SYMBOL voltage 1104 384 R0 SYMATTR InstName V2 SYMATTR Value -15 SYMBOL voltage 32 400 R0 WINDOW 0 25 22 Left 2 WINDOW 3 27 90 Left 2 SYMATTR InstName V3 SYMATTR Value ac 1 SYMBOL opamps\\UniversalOpamp2 128 -192 R0 WINDOW 38 12 24 Left 2 SYMATTR SpiceModel level.1 SYMATTR InstName U1 SYMBOL opamps\\UniversalOpamp2 128 208 R0 WINDOW 38 12 24 Left 2 SYMATTR InstName U2 SYMBOL opamps\\UniversalOpamp2 1072 -160 R0 WINDOW 38 12 24 Left 2 SYMATTR SpiceModel level.3a SYMATTR InstName U3 SYMBOL opamps\\UniversalOpamp2 1056 272 R0 WINDOW 38 12 24 Left 2 SYMATTR SpiceModel level.3b SYMATTR InstName U4 TEXT 152 464 Left 2 !.ac oct 10 .1 100Meg TEXT 264 -272 Left 2 ;A linear single pole opamp with no internal nodes\nor output voltage range limit.\nAvol=DC gain GBW=GBW product Vos=offset voltage\nen=equiv. input noise voltage density\nenk=equiv. input noise voltage density corner freq.\nin=equiv. input noise current density\nink=equiv. input noise current density corner freq.\nRin=Input resistance TEXT 272 104 Left 2 ;A single pole opamp with one internal node,\nslew rate limit and output voltage and current limit.\nAvol=DC gain GBW=GBW product\nSlew=Slewrate limit ilimit=current limit\nrail=output stage saturation voltage\nVos=offset voltage\nen=equiv. input noise voltage density\nenk=equiv. input noise voltage density corner freq.\nin=equiv. input noise current density\nink=equiv. input noise current density corner freq.\nRin=Input resistance TEXT 1224 104 Left 2 ;A dominate pole opamp with a delay, slew rate limit,\noutput voltage and current limit, and a programable\nphase margin. Implemented in 7 internal nodes.\nAvol=DC gain GBW=GBW product\nSlew=Slewrate limit ilimit=current limit\nrail=output stage saturation voltage\nVos=offset voltage\nphimargin=phase margin\nen=equiv. input noise voltage density\nenk=equiv. input noise voltage density corner freq.\nin=equiv. input noise current density\nink=equiv. input noise current density corner freq.\nRin=Input resistance TEXT 1224 -296 Left 2 ;A two pole opamp with two internal nodes,\nslew rate limit and output voltage and current limit\nand a programable phase margin.\nAvol=DC gain GBW=GBW product\nSlew=Slewrate limit ilimit=current limit\nrail=output stage saturation voltage\nVos=offset voltage\nphimargin=phase margin\nen=equiv. input noise voltage density\nenk=equiv. input noise voltage density corner freq.\nin=equiv. input noise current density\nink=equiv. input noise current density corner freq.\nRin=Input resistance TEXT 904 528 Top 1 ;This example schematic is supplied for informational/educational purposes only. TEXT 152 -440 Left 2 ;This demonstrates the use of the symbol UniversalOpamp2(improved version to the UniversalOpamp). You set the SpiceModel to be\nhigher to simulate more aspects of opamp behavior. Level1 is merely a transconductance working into an R||C and doesn't use power\nfrom the supplies. Level2 adds slewrate, current and voltage limits. Level3a adds a second pole. Level3b adds a delay to the dominate\npole response. Noise is modeled at all levels.