Version 4
SHEET 1 2740 696
WIRE 1472 -560 1408 -560
WIRE 1472 -528 1408 -528
WIRE 1472 -496 1408 -496
WIRE 1472 -464 1408 -464
WIRE 1472 -432 1408 -432
WIRE 1472 -400 1408 -400
WIRE 624 -384 624 -416
WIRE 784 -384 784 -400
WIRE 1712 -384 1664 -384
WIRE 1472 -368 1408 -368
WIRE 1472 -336 1408 -336
WIRE 1472 -304 1408 -304
WIRE 624 -272 624 -304
WIRE 784 -272 784 -304
WIRE 1472 -272 1408 -272
WIRE 1472 -240 1408 -240
WIRE 1472 -208 1408 -208
FLAG 784 -272 0
FLAG 784 -400 clock
FLAG 624 -272 0
FLAG 624 -416 VDD
FLAG 1712 -384 Vout
FLAG 1568 -608 VDD
FLAG 1584 -160 0
FLAG 1552 -160 VDD
FLAG 1296 -624 VDD
FLAG 1296 -160 Clock
FLAG 1184 -400 0
FLAG 1184 -432 0
FLAG 1184 -464 0
FLAG 1184 -496 0
FLAG 1184 -528 0
FLAG 1184 -560 VDD
FLAG 1184 -368 VDD
FLAG 1184 -208 0
FLAG 1184 -240 0
FLAG 1184 -272 0
FLAG 1184 -304 0
FLAG 1184 -336 0
SYMBOL voltage 784 -400 R0
WINDOW 0 36 42 Left 0
WINDOW 3 35 69 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vclock
SYMATTR Value PULSE(0 1 0 0 0 4.9n 10n)
SYMBOL voltage 624 -400 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1.0
SYMBOL Ideal_12_bit_DAC 1488 -176 R0
SYMATTR InstName X2
SYMBOL 12_bit_integrator 1216 -192 R0
SYMATTR InstName X10
TEXT 824 -464 Left 0 !.tran 0 1500n 0 .1n uic
TEXT 824 -432 Left 0 !.options plotwinsize=0