Version 4
SHEET 1 1324 932
WIRE 240 -1040 176 -1040
WIRE 176 -976 176 -1040
WIRE -32 -896 -48 -896
WIRE 32 -896 -32 -896
WIRE 288 -880 224 -880
WIRE -272 -864 -304 -864
WIRE 16 -864 0 -864
WIRE 32 -864 16 -864
WIRE 176 -704 176 -784
WIRE 48 -624 16 -624
WIRE -368 -592 -400 -592
WIRE -112 -592 -144 -592
WIRE -96 -592 -112 -592
WIRE 48 -592 16 -592
WIRE 288 -576 256 -576
WIRE -368 -560 -400 -560
WIRE -112 -560 -144 -560
WIRE -96 -560 -112 -560
WIRE 48 -560 16 -560
WIRE 288 -544 256 -544
WIRE -368 -528 -400 -528
WIRE -112 -528 -144 -528
WIRE -96 -528 -112 -528
WIRE 48 -528 16 -528
WIRE 288 -512 256 -512
WIRE -368 -496 -400 -496
WIRE -112 -496 -144 -496
WIRE -96 -496 -112 -496
WIRE 48 -496 16 -496
WIRE 288 -480 256 -480
WIRE 48 -464 16 -464
WIRE 48 -432 16 -432
WIRE 48 -400 16 -400
WIRE 176 -304 176 -336
FLAG -256 -672 VDD
FLAG -256 -432 clock
FLAG 112 -704 VDD
FLAG -400 -592 B3
IOPIN -400 -592 In
FLAG -400 -560 B2
IOPIN -400 -560 In
FLAG -400 -528 B1
IOPIN -400 -528 In
FLAG -400 -496 B0
IOPIN -400 -496 In
FLAG -112 -592 B3D
FLAG -112 -560 B2D
FLAG -112 -528 B1D
FLAG -112 -496 B0D
FLAG 288 -576 S3
IOPIN 288 -576 Out
FLAG 288 -544 S2
IOPIN 288 -544 Out
FLAG 288 -512 S1
IOPIN 288 -512 Out
FLAG 288 -480 S0
IOPIN 288 -480 Out
FLAG 16 -592 B3
FLAG 16 -528 B2
FLAG 16 -464 B1
FLAG 16 -400 B0
FLAG 16 -432 B0D
FLAG 16 -496 B1D
FLAG 16 -560 B2D
FLAG 16 -624 B3D
FLAG 176 -304 0
FLAG -160 -944 VDD
FLAG -160 -784 clock
FLAG -304 -864 B4
IOPIN -304 -864 In
FLAG 80 -976 VDD
FLAG 240 -1040 S5
IOPIN 240 -1040 Out
FLAG 288 -880 S4
IOPIN 288 -880 Out
FLAG -32 -896 B4D
FLAG 16 -864 B4
SYMBOL 4_bit_register -336 -464 R0
SYMATTR InstName X1
SYMBOL 4_bit_adder 80 -368 R0
SYMATTR InstName X2
SYMBOL DFF -240 -816 R0
SYMATTR InstName X3
SYMBOL Adderbit 48 -800 R0
SYMATTR InstName X4
TEXT 248 -424 Left 0 ;Implements the function 1+z^-1\nSee Figure 1.16
TEXT -288 -1048 Left 0 ;Doesn't use two's complement