Version 4
SHEET 1 4120 1896
WIRE 1120 656 1024 656
WIRE 1312 656 1184 656
WIRE 1024 688 1024 656
WIRE 1312 720 1312 656
WIRE 1024 736 1024 688
WIRE 1472 736 1472 720
WIRE 1616 736 1616 720
WIRE 1312 784 1312 720
WIRE 1472 848 1472 816
WIRE 1616 848 1616 816
WIRE 944 1088 912 1088
WIRE 992 1088 944 1088
WIRE 1664 1088 1632 1088
WIRE 1712 1088 1664 1088
WIRE 912 1104 912 1088
WIRE 2208 1120 2208 1088
WIRE 2400 1120 2400 1088
WIRE 1472 1184 1472 1168
WIRE 912 1200 912 1184
WIRE 1216 1248 1216 1088
WIRE 1664 1248 1664 1088
WIRE 1664 1248 1216 1248
WIRE 1920 1392 1920 1360
WIRE 1984 1392 1920 1392
WIRE 2096 1392 1984 1392
WIRE 2400 1392 2352 1392
WIRE 2416 1392 2400 1392
FLAG 2208 1120 0
FLAG 2208 1008 p1_1
FLAG 2400 1120 0
FLAG 2400 1008 p2_1
FLAG 912 1200 0
FLAG 944 1088 Vin
FLAG 1168 960 VDD
FLAG 1040 960 p1_1
FLAG 1104 960 p2_1
FLAG 992 1040 VCM
FLAG 1472 1008 VDD
FLAG 1472 1184 p1_1
FLAG 1664 1088 out1
FLAG 1216 1040 Vsum
FLAG 1344 1136 Vint
FLAG 1344 1040 VCM
FLAG 1024 832 VCM
FLAG 1312 720 Vint
FLAG 1024 688 Vsum
FLAG 1808 1296 out1
FLAG 1808 1264 out1
FLAG 1920 1008 VDD
FLAG 1984 1392 p1_1
FLAG 1808 1232 out1
FLAG 1808 1200 out1
FLAG 1808 1168 out1
FLAG 1808 1136 out1
FLAG 1808 1104 out1
FLAG 1808 1072 out1
FLAG 2032 1296 b0
FLAG 2032 1264 b1
FLAG 2032 1232 b2
FLAG 2032 1200 b3
FLAG 2032 1168 b4
FLAG 2032 1136 b5
FLAG 2032 1104 b6
FLAG 2032 1072 b7
FLAG 1472 848 0
FLAG 1472 720 VDD
FLAG 1616 848 0
FLAG 1616 720 VCM
FLAG 2208 1312 VDD
FLAG 2400 1392 clk
SYMBOL voltage 2208 992 R0
WINDOW 0 36 42 Left 0
WINDOW 3 -52 207 VLeft 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vp1_1
SYMATTR Value Pulse 0 {VDD} 0 100p 100p 4.8n 10n
SYMBOL voltage 2400 992 R0
WINDOW 0 36 42 Left 0
WINDOW 3 -52 207 VLeft 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vp2_1
SYMATTR Value PULSE(0 {VDD} 5n 100p 100p 4.8n 10n)
SYMBOL voltage 912 1088 R0
WINDOW 0 26 93 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -51 128 VLeft 0
SYMATTR InstName Vin
SYMATTR Value SINE({VCM} 2 3MEG)
SYMBOL Ideal_clocked_comparator 1392 1088 R0
SYMATTR InstName X1
SYMBOL SC_input_1 1008 1120 R0
SYMATTR InstName X9
SYMBOL Ideal_op_amp 1072 784 R0
SYMATTR InstName X28
SYMBOL cap 1120 672 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName C2
SYMATTR Value 400f
SYMBOL 8_bit_register 1840 1328 R0
SYMATTR InstName X17
SYMBOL voltage 1472 720 R0
WINDOW 0 48 35 Left 0
WINDOW 3 41 74 Left 0
SYMATTR InstName VDD
SYMATTR Value {VDD}
SYMBOL voltage 1616 720 R0
WINDOW 0 36 35 Left 0
WINDOW 3 43 76 Left 0
SYMATTR InstName VCM
SYMATTR Value {VCM}
SYMBOL Ideal_inverter 2128 1328 R0
SYMATTR InstName X18
TEXT 1088 1392 Left 0 !.tran 0 3.1u 100n 10p uic
TEXT 1088 1424 Left 0 !.options plotwinsize=0
TEXT 1056 1352 Left 0 !.save v(clk) v(vin) v(b0) v(b1) v(b2) v(b3) v(b4) v(b5) v(b6) v(b7) v(Vint)
TEXT 1072 1464 Left 0 !.model switmod SW
TEXT 1416 1400 Left 0 !.param VDD=5 VCM=2.5
TEXT 1784 632 Left 0 ;Kpath = 8 OSR = 64\nFor 1-bit output (serial mode) at Kpath*fs = 801 MHz\nSNR = 35.79, Neff = 5.65, B = 6.26 MHz\nFor Kpath-bits output (parallel mode) at fs = 100 MHz\nSNR = 35.71, Neff = 5.64, B = 6.24 MHz