Version 4
SHEET 1 3252 680
WIRE 432 -256 432 -448
WIRE 800 -336 544 -336
WIRE 800 -176 544 -176
WIRE 1056 -336 800 -336
WIRE 1056 -176 800 -176
WIRE 1312 -336 1056 -336
WIRE 1312 -176 1056 -176
WIRE 1568 -336 1312 -336
WIRE 1568 -176 1312 -176
WIRE 1584 -112 1584 -128
WIRE 1584 -96 1584 -112
WIRE 1584 16 1584 -16
WIRE 1696 -336 1568 -336
WIRE 1712 -176 1568 -176
WIRE 1712 -128 1712 -176
WIRE 1824 -336 1696 -336
WIRE 1824 -176 1712 -176
WIRE 2080 -336 1824 -336
WIRE 2080 -176 1824 -176
WIRE 2128 -448 432 -448
WIRE 2336 -336 2080 -336
WIRE 2336 -176 2080 -176
WIRE 2592 -336 2336 -336
WIRE 2592 -176 2336 -176
WIRE 2848 -336 2592 -336
WIRE 2848 -176 2592 -176
WIRE 3104 -336 2848 -336
WIRE 3104 -176 2848 -176
WIRE 3248 -448 2128 -448
WIRE 3248 -256 3248 -448
FLAG 1584 16 0
FLAG 1584 -112 VDD
FLAG 1712 -128 0
FLAG 1696 -336 VDD
FLAG 2128 -448 Osc
SYMBOL voltage 1584 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName VDD
SYMATTR Value 1
SYMBOL INV_20_10 464 -320 R0
SYMATTR InstName U1
SYMBOL INV_20_10 720 -320 R0
SYMATTR InstName U2
SYMBOL INV_20_10 976 -320 R0
SYMATTR InstName U3
SYMBOL INV_20_10 1232 -320 R0
SYMATTR InstName U4
SYMBOL INV_20_10 1488 -320 R0
SYMATTR InstName U5
SYMBOL INV_20_10 1744 -320 R0
SYMATTR InstName U6
SYMBOL INV_20_10 2000 -320 R0
SYMATTR InstName U7
SYMBOL INV_20_10 2256 -320 R0
SYMATTR InstName U8
SYMBOL INV_20_10 2512 -320 R0
SYMATTR InstName U9
SYMBOL INV_20_10 2768 -320 R0
SYMATTR InstName U10
SYMBOL INV_20_10 3024 -320 R0
SYMATTR InstName U11
TEXT 1808 -128 Left 0 !.tran 0 2n 0 1p
TEXT 1808 -88 Left 0 !.lib cmosedu_models.txt
TEXT 536 -480 Left 0 ;Plot Osc
TEXT 1968 -128 Left 0 !.ic v(osc)=1