Version 4
SHEET 1 1556 680
WIRE -16 -544 -16 -576
WIRE -16 -432 -16 -464
WIRE 0 -240 0 -256
WIRE 0 -144 0 -160
WIRE 112 -544 112 -576
WIRE 112 -432 112 -464
WIRE 192 -224 192 -256
WIRE 192 -112 192 -144
WIRE 288 -544 288 -576
WIRE 288 -432 288 -464
WIRE 384 -240 384 -256
WIRE 384 -144 384 -160
WIRE 544 -800 336 -800
WIRE 608 -800 544 -800
WIRE 608 -800 608 -832
WIRE 640 -416 608 -416
WIRE 656 -912 656 -944
WIRE 656 -768 656 -816
WIRE 656 -752 656 -768
WIRE 656 0 608 0
WIRE 768 -944 656 -944
WIRE 768 -944 768 -992
WIRE 768 -464 768 -944
WIRE 768 -368 768 -464
WIRE 768 -352 768 -368
WIRE 768 -304 688 -304
WIRE 768 -304 768 -352
WIRE 768 -256 768 -304
WIRE 768 -240 768 -256
WIRE 768 -96 768 -144
WIRE 800 -352 768 -352
WIRE 848 -160 816 -160
WIRE 864 -256 768 -256
WIRE 880 -416 640 -416
WIRE 880 -400 880 -416
WIRE 912 -464 768 -464
WIRE 912 0 656 0
WIRE 928 -416 880 -416
WIRE 944 -352 896 -352
WIRE 944 -304 944 -352
WIRE 944 -288 944 -304
WIRE 960 -96 768 -96
WIRE 960 -80 960 -96
WIRE 976 -352 944 -352
WIRE 1008 -800 608 -800
WIRE 1008 -176 864 -256
WIRE 1040 -256 848 -160
WIRE 1040 -160 1008 -176
WIRE 1056 -416 928 -416
WIRE 1056 -400 1056 -416
WIRE 1072 -160 1040 -160
WIRE 1088 176 880 176
WIRE 1120 -464 1008 -464
WIRE 1120 -464 1120 -528
WIRE 1120 -352 1072 -352
WIRE 1120 -352 1120 -464
WIRE 1120 -336 1120 -352
WIRE 1120 -304 1120 -336
WIRE 1120 -256 1040 -256
WIRE 1120 -256 1120 -304
WIRE 1120 -240 1120 -256
WIRE 1120 -96 960 -96
WIRE 1120 -96 1120 -144
WIRE 1152 176 1088 176
WIRE 1152 176 1152 144
WIRE 1200 -304 1120 -304
WIRE 1200 64 1200 32
WIRE 1200 208 1200 160
WIRE 1200 224 1200 208
WIRE 1296 -416 1056 -416
WIRE 1312 -528 1120 -528
WIRE 1312 32 1200 32
WIRE 1312 32 1312 -528
WIRE 1312 336 1312 32
WIRE 1552 176 1152 176
FLAG 0 -144 0
FLAG 0 -256 Eq
FLAG 960 -32 0
FLAG -16 -432 0
FLAG -16 -576 VDD
FLAG 112 -432 0
FLAG 112 -576 VDDby2
FLAG 192 -112 0
FLAG 192 -256 sense_N
FLAG 1120 -192 0
FLAG 768 -192 0
FLAG 960 -464 0
FLAG 848 -352 0
FLAG 1024 -352 0
FLAG 640 -416 Eq
FLAG 944 -304 VDDby2
FLAG 656 0 sense_N
FLAG 960 16 0
FLAG 1200 -240 0
FLAG 688 -240 0
FLAG 768 -368 bitline0
FLAG 1120 -336 bitline1
FLAG 656 -864 0
FLAG 656 -688 0
FLAG 656 -768 mb0
FLAG 544 -800 ra0
FLAG 1200 112 0
FLAG 1200 288 0
FLAG 1200 208 mb1
FLAG 1088 176 ra1
FLAG 384 -144 0
FLAG 384 -256 ra0
FLAG 288 -432 0
FLAG 288 -576 ra1
SYMBOL nmos4 912 -80 R0
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 0 -256 R0
WINDOW 0 -72 21 Left 0
WINDOW 3 -99 147 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Veq
SYMATTR Value PULSE 0 1 5n 0 0 4n
SYMBOL voltage -16 -560 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 40 53 Left 0
SYMATTR Value 1
SYMATTR InstName VDD
SYMBOL voltage 112 -560 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 41 53 Left 0
SYMATTR Value 500mV
SYMATTR InstName VDDby2
SYMBOL voltage 192 -240 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -71 169 Left 0
SYMATTR Value PULSE 0 1 15n
SYMATTR InstName Vsn
SYMBOL nmos4 1072 -240 R0
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M2
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 816 -240 M0
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M3
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 1008 -416 M270
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M4
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 800 -400 M90
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M5
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 976 -400 M90
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M6
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL cap 1184 -304 R0
WINDOW 3 43 46 Left 0
SYMATTR Value 100f
SYMATTR InstName Ccol1
SYMBOL cap 704 -304 M0
WINDOW 3 43 46 Left 0
SYMATTR Value 100f
SYMATTR InstName Ccol0
SYMBOL nmos4 608 -912 R0
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M7
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL cap 640 -752 R0
WINDOW 3 41 47 Left 0
SYMATTR Value 20f
SYMATTR InstName Cmbit0
SYMBOL nmos4 1152 64 R0
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M8
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL cap 1184 224 R0
WINDOW 3 41 47 Left 0
SYMATTR Value 20f
SYMATTR InstName Cmbit1
SYMBOL voltage 384 -256 R0
WINDOW 0 -72 21 Left 0
WINDOW 3 -99 147 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vra0
SYMATTR Value PULSE 0 1.5 12n
SYMBOL voltage 288 -560 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 41 53 Left 0
SYMATTR Value 0
SYMATTR InstName Vsn1
TEXT -48 144 Left 0 !.lib cmosedu_models.txt
TEXT 752 -480 VLeft 0 ;Bitline to array0
TEXT 1296 -8 VLeft 0 ;Bitline to array1
TEXT 136 104 Left 0 !.ic v(bitline0)=250m v(bitline1)=750m v(mb0)=0
TEXT -32 104 Left 0 !.tran 20n uic
TEXT 880 -720 Left 0 ;Plot Eq, bitline0, bitline1, ra0, and sense_n
TEXT 288 -816 Left 0 ;Word line in array 0
TEXT 832 160 Left 0 ;Word line in array 1