Version 4
SHEET 1 1556 680
WIRE -16 -896 -16 -928
WIRE -16 -784 -16 -816
WIRE -16 -544 -16 -576
WIRE -16 -432 -16 -464
WIRE 0 -240 0 -256
WIRE 0 -144 0 -160
WIRE 112 -544 112 -576
WIRE 112 -432 112 -464
WIRE 160 -896 160 -928
WIRE 160 -784 160 -816
WIRE 272 -240 272 -256
WIRE 272 -144 272 -160
WIRE 288 -544 288 -576
WIRE 288 -432 288 -464
WIRE 432 -736 384 -736
WIRE 544 -944 336 -944
WIRE 608 -944 544 -944
WIRE 608 -944 608 -976
WIRE 640 -736 432 -736
WIRE 640 -368 608 -368
WIRE 656 -1056 656 -1088
WIRE 656 -912 656 -960
WIRE 656 -896 656 -912
WIRE 672 32 416 32
WIRE 768 -1088 656 -1088
WIRE 768 -1088 768 -1136
WIRE 768 -512 768 -1088
WIRE 768 -416 768 -512
WIRE 768 -320 768 -416
WIRE 768 -304 768 -320
WIRE 768 -256 688 -256
WIRE 768 -256 768 -304
WIRE 768 -192 768 -256
WIRE 800 -304 768 -304
WIRE 832 -656 688 -656
WIRE 832 -624 832 -656
WIRE 832 -512 768 -512
WIRE 832 -512 832 -528
WIRE 832 -192 768 -192
WIRE 832 -176 832 -192
WIRE 832 -48 720 -48
WIRE 832 -48 832 -80
WIRE 880 -368 640 -368
WIRE 880 -352 880 -368
WIRE 912 -656 832 -656
WIRE 912 -608 880 -608
WIRE 912 -512 832 -512
WIRE 912 -416 768 -416
WIRE 912 -192 832 -192
WIRE 912 -96 880 -96
WIRE 928 -368 880 -368
WIRE 944 -304 896 -304
WIRE 944 -256 944 -304
WIRE 944 -240 944 -256
WIRE 960 -608 912 -512
WIRE 960 -512 912 -608
WIRE 960 -48 832 -48
WIRE 976 -304 944 -304
WIRE 976 -192 912 -96
WIRE 976 -96 912 -192
WIRE 992 -608 960 -608
WIRE 992 -96 976 -96
WIRE 1008 -944 608 -944
WIRE 1040 -656 912 -656
WIRE 1040 -624 1040 -656
WIRE 1040 -512 960 -512
WIRE 1040 -512 1040 -528
WIRE 1040 -192 976 -192
WIRE 1040 -176 1040 -192
WIRE 1040 -48 960 -48
WIRE 1040 -48 1040 -80
WIRE 1056 -368 928 -368
WIRE 1056 -352 1056 -368
WIRE 1088 272 880 272
WIRE 1120 -512 1040 -512
WIRE 1120 -512 1120 -528
WIRE 1120 -416 1008 -416
WIRE 1120 -416 1120 -512
WIRE 1120 -304 1072 -304
WIRE 1120 -304 1120 -416
WIRE 1120 -288 1120 -304
WIRE 1120 -256 1120 -288
WIRE 1120 -192 1040 -192
WIRE 1120 -192 1120 -256
WIRE 1152 272 1088 272
WIRE 1152 272 1152 240
WIRE 1200 -256 1120 -256
WIRE 1200 160 1200 128
WIRE 1200 304 1200 256
WIRE 1200 320 1200 304
WIRE 1296 -368 1056 -368
WIRE 1312 -528 1120 -528
WIRE 1312 128 1200 128
WIRE 1312 128 1312 -528
WIRE 1312 432 1312 128
WIRE 1552 272 1152 272
FLAG 0 -144 0
FLAG 0 -256 Eq
FLAG 720 0 0
FLAG -16 -432 0
FLAG -16 -576 VDD
FLAG 112 -432 0
FLAG 112 -576 VDDby2
FLAG -16 -784 0
FLAG -16 -928 sense_P
FLAG 1040 -128 0
FLAG 832 -128 0
FLAG 960 -416 0
FLAG 848 -304 0
FLAG 1024 -304 0
FLAG 640 -368 Eq
FLAG 944 -256 VDDby2
FLAG 416 32 sense_N
FLAG 720 48 0
FLAG 1200 -192 0
FLAG 688 -192 0
FLAG 768 -320 bitline0
FLAG 1120 -288 bitline1
FLAG 656 -1008 0
FLAG 656 -832 0
FLAG 656 -912 mb0
FLAG 544 -944 ra0
FLAG 1200 208 0
FLAG 1200 384 0
FLAG 1200 304 mb1
FLAG 1088 272 ra1
FLAG 272 -144 0
FLAG 272 -256 ra0
FLAG 288 -432 0
FLAG 288 -576 ra1
FLAG 688 -704 VDD
FLAG 1040 -576 VDD
FLAG 832 -576 VDD
FLAG 688 -752 VDD
FLAG 432 -736 sense_p
FLAG 912 -656 ACT
FLAG 960 -48 NLAT
FLAG 160 -784 0
FLAG 160 -928 sense_N
SYMBOL nmos4 672 -48 R0
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 0 -256 R0
WINDOW 0 -72 21 Left 0
WINDOW 3 -99 147 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Veq
SYMATTR Value PULSE 0 1 5n 0 0 4n
SYMBOL voltage -16 -560 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 40 53 Left 0
SYMATTR Value 1
SYMATTR InstName VDD
SYMBOL voltage 112 -560 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 41 53 Left 0
SYMATTR Value 500mV
SYMATTR InstName VDDby2
SYMBOL voltage -16 -912 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -71 169 Left 0
SYMATTR Value PULSE 1 0 18n
SYMATTR InstName Vsp
SYMBOL nmos4 992 -176 R0
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M2
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 880 -176 M0
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M3
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 1008 -368 M270
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M4
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 800 -352 M90
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M5
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 976 -352 M90
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M6
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL cap 1184 -256 R0
WINDOW 3 43 46 Left 0
SYMATTR Value 100f
SYMATTR InstName Ccol1
SYMBOL cap 704 -256 M0
WINDOW 3 43 46 Left 0
SYMATTR Value 100f
SYMATTR InstName Ccol0
SYMBOL nmos4 608 -1056 R0
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M7
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL cap 640 -896 R0
WINDOW 3 41 47 Left 0
SYMATTR Value 20f
SYMATTR InstName Cmbit0
SYMBOL nmos4 1152 160 R0
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M8
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL cap 1184 320 R0
WINDOW 3 41 47 Left 0
SYMATTR Value 20f
SYMATTR InstName Cmbit1
SYMBOL voltage 272 -256 R0
WINDOW 0 -72 21 Left 0
WINDOW 3 -99 147 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vra0
SYMATTR Value PULSE 0 1.5 12n
SYMBOL voltage 288 -560 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 41 53 Left 0
SYMATTR Value 0
SYMATTR InstName Vsn1
SYMBOL pmos4 640 -656 M180
WINDOW 0 56 32 Invisible 0
WINDOW 3 56 72 Invisible 0
SYMATTR InstName M9
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL pmos4 992 -528 M180
WINDOW 0 56 32 Invisible 0
WINDOW 3 56 72 Invisible 0
SYMATTR InstName M10
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL pmos4 880 -528 R180
WINDOW 0 56 32 Invisible 0
WINDOW 3 56 72 Invisible 0
SYMATTR InstName M11
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL voltage 160 -912 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -71 169 Left 0
SYMATTR Value PULSE 0 1 15n
SYMATTR InstName Vsn
TEXT -32 136 Left 0 !.lib cmosedu_models.txt
TEXT 800 -952 VLeft 0 ;Bitline to array0
TEXT 1296 96 VLeft 0 ;Bitline to array1
TEXT 136 104 Left 0 !.ic v(bitline0)=250m v(bitline1)=750m v(mb0)=1
TEXT -32 104 Left 0 !.tran 30n uic
TEXT -48 216 Left 0 ;Plot Eq, ra0, bitline0+1.25, bitline1+1.25, sense_n+2.5, and sense_p+3.75
TEXT 288 -960 Left 0 ;Word line in array 0
TEXT 832 256 Left 0 ;Word line in array 1