Version 4
SHEET 1 1556 680
WIRE 240 -544 240 -576
WIRE 240 -432 240 -464
WIRE 240 -256 240 -288
WIRE 240 -144 240 -176
WIRE 384 -352 384 -448
WIRE 384 -256 384 -352
WIRE 416 -448 384 -448
WIRE 416 -256 384 -256
WIRE 464 -352 464 -368
WIRE 464 -336 464 -352
WIRE 464 -224 464 -240
WIRE 512 -352 464 -352
WIRE 544 -352 512 -352
WIRE 624 -96 624 -304
WIRE 688 -352 640 -352
WIRE 688 -96 624 -96
WIRE 720 -400 720 -416
WIRE 720 -352 688 -352
WIRE 720 -352 720 -400
WIRE 720 -320 720 -352
WIRE 720 -304 720 -320
WIRE 720 -192 720 -208
WIRE 752 -96 688 -96
WIRE 752 -32 752 -96
WIRE 800 -496 768 -496
WIRE 800 -400 720 -400
WIRE 800 -320 720 -320
WIRE 800 -224 768 -224
WIRE 800 -96 752 -96
WIRE 848 -192 720 -192
WIRE 848 -176 848 -192
WIRE 880 -496 800 -400
WIRE 880 -400 800 -496
WIRE 880 -320 800 -224
WIRE 880 -224 800 -320
WIRE 912 -496 880 -496
WIRE 912 -224 880 -224
WIRE 960 -400 880 -400
WIRE 960 -400 960 -416
WIRE 960 -352 960 -400
WIRE 960 -320 880 -320
WIRE 960 -320 960 -352
WIRE 960 -304 960 -320
WIRE 960 -192 848 -192
WIRE 960 -192 960 -208
WIRE 1008 -352 960 -352
WIRE 1056 -352 1008 -352
WIRE 1136 -32 752 -32
WIRE 1136 -32 1136 -304
WIRE 1184 -352 1152 -352
WIRE 1296 -352 1184 -352
WIRE 1296 -352 1296 -368
WIRE 1296 -336 1296 -352
WIRE 1296 -224 1296 -240
WIRE 1376 -448 1344 -448
WIRE 1376 -256 1344 -256
WIRE 1376 -256 1376 -448
WIRE 1376 -224 1376 -256
FLAG 848 -128 0
FLAG 240 -432 0
FLAG 240 -576 VDD
FLAG 1104 -352 VDD
FLAG 720 -464 VDD
FLAG 960 -464 VDD
FLAG 720 -512 VDD
FLAG 960 -512 VDD
FLAG 592 -352 VDD
FLAG 848 -80 0
FLAG 960 -256 0
FLAG 720 -256 0
FLAG 512 -352 Inp
FLAG 1184 -352 Inm
FLAG 688 -96 clock
FLAG 1008 -352 Outm
FLAG 688 -352 Outp
FLAG 240 -144 0
FLAG 240 -288 clock
FLAG 1296 -416 VDD
FLAG 1296 -464 VDD
FLAG 1296 -288 0
FLAG 1296 -224 0
FLAG 1376 -224 0
FLAG 464 -416 VDD
FLAG 464 -464 VDD
FLAG 464 -288 0
FLAG 464 -224 0
FLAG 384 -352 VDD
SYMBOL nmos4 800 -176 R0
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M1
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 240 -560 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 40 53 Left 0
SYMATTR Value 1
SYMATTR InstName VDD
SYMBOL pmos4 1056 -304 R270
WINDOW 0 56 32 Invisible 0
WINDOW 3 56 72 Invisible 0
SYMATTR InstName M11
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL pmos4 768 -416 R180
WINDOW 0 56 32 Invisible 0
WINDOW 3 56 72 Invisible 0
SYMATTR InstName M2
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL pmos4 912 -416 M180
WINDOW 0 56 32 Invisible 0
WINDOW 3 56 72 Invisible 0
SYMATTR InstName M3
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL pmos4 544 -304 R270
WINDOW 0 56 32 Invisible 0
WINDOW 3 56 72 Invisible 0
SYMATTR InstName M4
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL nmos4 912 -304 R0
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M5
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL nmos4 768 -304 M0
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
SYMATTR InstName M6
SYMATTR Value N_50n
SYMATTR Value2 l=50n w=500n
SYMBOL voltage 240 -272 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -83 163 Left 0
SYMATTR Value PULSE(0 1 0 10p 10p 5n 10n)
SYMATTR InstName Vclock
SYMBOL pmos4 1344 -368 R180
WINDOW 0 56 32 Invisible 0
WINDOW 3 56 72 Invisible 0
WINDOW 123 59 79 Left 0
SYMATTR InstName M7
SYMATTR Value P_50n
SYMATTR Value2 l=500n w=1u
SYMBOL nmos4 1344 -336 M0
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
WINDOW 123 29 153 Left 0
SYMATTR InstName M8
SYMATTR Value N_50n
SYMATTR Value2 l=500n w=500n
SYMBOL pmos4 416 -368 M180
WINDOW 0 56 32 Invisible 0
WINDOW 3 56 72 Invisible 0
WINDOW 123 59 79 Left 0
SYMATTR InstName M9
SYMATTR Value P_50n
SYMATTR Value2 l=500n w=1u
SYMBOL nmos4 416 -336 R0
WINDOW 0 104 24 Invisible 0
WINDOW 3 179 41 Invisible 0
WINDOW 123 29 153 Left 0
SYMATTR InstName M10
SYMATTR Value N_50n
SYMATTR Value2 l=500n w=500n
TEXT 232 0 Left 0 !.lib cmosedu_models.txt
TEXT 232 -32 Left 0 !.tran 0 21n 19n 10p uic
TEXT 928 -688 Left 0 ;Plot vinp vinm