Version 4
SHEET 1 1556 680
WIRE 928 -448 928 -464
WIRE 1104 -448 928 -448
WIRE 928 -432 928 -448
WIRE 512 -416 512 -448
WIRE 80 -400 80 -432
WIRE 352 -400 352 -432
WIRE 1104 -368 1104 -384
WIRE 512 -304 512 -336
WIRE 928 -304 928 -336
WIRE 80 -288 80 -320
WIRE 352 -288 352 -320
WIRE 1280 -288 976 -288
WIRE 928 -192 928 -208
WIRE 960 -192 928 -192
WIRE 688 -176 656 -176
WIRE 736 -176 688 -176
WIRE 352 -160 352 -192
WIRE 80 -144 80 -176
WIRE 960 -144 960 -192
WIRE 960 -144 928 -144
WIRE 928 -80 928 -96
WIRE 992 -80 928 -80
WIRE 1024 -80 992 -80
WIRE 736 -64 736 -96
WIRE 928 -64 928 -80
WIRE 928 -64 736 -64
WIRE 1280 -64 1280 -288
WIRE 352 -48 352 -80
WIRE 80 -32 80 -64
WIRE 1328 16 1280 16
WIRE 736 32 736 0
FLAG 80 -288 0
FLAG 80 -432 VDD
FLAG 928 -512 VDD
FLAG 928 -560 VDD
FLAG 80 -32 0
FLAG 80 -176 Phi1
FLAG 352 -48 0
FLAG 352 -192 phi2
FLAG 928 -384 VDD
FLAG 928 -256 VDD
FLAG 880 -544 phi1
FLAG 880 -416 phi2
FLAG 992 -80 vbit
FLAG 1104 -368 0
FLAG 880 -176 VREF
FLAG 352 -288 0
FLAG 352 -432 VREF
FLAG 1152 -128 VDD
FLAG 512 -304 0
FLAG 512 -448 clock
FLAG 1024 16 VREF
FLAG 736 32 0
FLAG 1104 -160 clock
FLAG 688 -176 VREF
FLAG 1152 64 0
FLAG 1328 16 Out
SYMBOL voltage 80 -416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 40 53 Left 0
SYMATTR Value 1
SYMATTR InstName VDD
SYMBOL pmos4 880 -464 M180
WINDOW 0 56 32 Invisible 0
WINDOW 3 56 72 Invisible 0
SYMATTR InstName M3
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL voltage 80 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -40 182 Left 0
SYMATTR Value PULSE(1 0 1n 10p 10p 4n 10n)
SYMATTR InstName Vphi1
SYMBOL voltage 352 -176 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -83 163 Left 0
SYMATTR Value PULSE 1 0 6n 10p 10p 4n 10n
SYMATTR InstName Vphi2
SYMBOL pmos4 880 -336 M180
WINDOW 0 56 32 Invisible 0
WINDOW 3 56 72 Invisible 0
SYMATTR InstName M1
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL pmos4 976 -208 R180
WINDOW 0 56 32 Invisible 0
WINDOW 3 56 72 Invisible 0
SYMATTR InstName M2
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL cap 1088 -448 R0
SYMATTR InstName C1
SYMATTR Value 100f
SYMBOL pmos4 880 -96 M180
WINDOW 0 56 32 Invisible 0
WINDOW 3 56 72 Invisible 0
SYMATTR InstName M4
SYMATTR Value P_50n
SYMATTR Value2 l=50n w=1u
SYMBOL voltage 352 -416 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 40 53 Left 0
SYMATTR Value 500m
SYMATTR InstName VREF
SYMBOL Fig_17_16 1072 -32 R0
SYMATTR InstName U1
SYMBOL voltage 512 -432 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 -83 163 Left 0
SYMATTR Value PULSE 0 1 5n 10p 10p 5n 10n
SYMATTR InstName Vclock
SYMBOL cap 720 -64 R0
WINDOW 0 43 22 Left 0
WINDOW 3 45 50 Left 0
SYMATTR InstName Cbit
SYMATTR Value 500f
SYMBOL res 720 -192 R0
SYMATTR InstName R1
SYMATTR Value 200k
TEXT 72 80 Left 0 !.lib cmosedu_models.txt
TEXT 424 104 Left 0 !.tran 0 600n 100n uic
TEXT 152 -552 Left 0 ;Plot Vref Vbit Out