Version 4
SHEET 1 880 680
WIRE -496 -736 -544 -736
WIRE -432 -736 -496 -736
WIRE -496 -704 -544 -704
WIRE -432 -704 -496 -704
WIRE -496 -672 -544 -672
WIRE -432 -672 -496 -672
WIRE -192 -672 -240 -672
WIRE -176 -672 -192 -672
WIRE -192 -656 -192 -672
WIRE -496 -640 -544 -640
WIRE -432 -640 -496 -640
WIRE -192 -560 -192 -576
WIRE -800 -512 -816 -512
WIRE -672 -512 -688 -512
WIRE -528 -512 -544 -512
WIRE -816 -480 -816 -512
WIRE -688 -480 -688 -512
WIRE -544 -480 -544 -512
WIRE -352 -480 -352 -512
WIRE -320 -480 -320 -512
WIRE -912 -448 -944 -448
WIRE -944 -416 -944 -448
WIRE -816 -384 -816 -400
WIRE -688 -384 -688 -400
WIRE -544 -384 -544 -400
WIRE -944 -320 -944 -336
FLAG -944 -320 0
FLAG -544 -384 0
FLAG -912 -448 Vin
FLAG -336 -832 VDD
FLAG -496 -736 D3
FLAG -496 -704 D2
FLAG -496 -672 D1
FLAG -496 -640 D0
FLAG -176 -672 Vout
FLAG -688 -384 0
FLAG -672 -512 VrefM
FLAG -320 -480 VrefM
FLAG -816 -384 0
FLAG -800 -512 VDD
FLAG -352 -480 VrefP
FLAG -816 -688 Vin
FLAG -640 -768 VDD
FLAG -704 -768 VrefP
FLAG -528 -512 VrefP
FLAG -704 -608 VrefM
FLAG -192 -560 0
SYMBOL voltage -544 -496 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 29 87 Left 0
SYMATTR Value {VrefP}
SYMATTR InstName V1
SYMBOL voltage -944 -432 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Vin1
SYMATTR Value PULSE({VrefM} {VrefP} 0 {tr} {tr} 0 {2*tr})
SYMBOL Ideal_4_bit_DAC -416 -528 R0
SYMATTR InstName X1
SYMBOL voltage -688 -496 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 28 89 Left 0
SYMATTR Value {VrefM}
SYMATTR InstName V2
SYMBOL voltage -816 -496 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 30 83 Left 0
SYMATTR Value 5
SYMATTR InstName VDD
SYMBOL SAR_ADC_4Bit -800 -688 R0
SYMATTR InstName X2
SYMBOL res -208 -672 R0
SYMATTR InstName R1
SYMATTR Value 10k
TEXT -272 -344 Left 0 !.tran 0 {2*tr} 0 .1n
TEXT -272 -464 Left 0 !.param Vos=0\n.param VrefP=16\n.param VrefM=0
TEXT -272 -376 Left 0 !.param tr=1.6u
TEXT -424 -296 Left 0 !.options plotwinsize 0