Version 4
SHEET 1 1628 680
WIRE 96 16 64 16
WIRE 416 16 352 16
WIRE 640 16 512 16
WIRE 720 16 640 16
WIRE 864 16 720 16
WIRE 912 16 864 16
WIRE 64 64 64 16
WIRE 640 80 640 16
WIRE 720 80 720 16
WIRE 864 80 864 16
WIRE 416 96 352 96
WIRE 576 96 512 96
WIRE 464 144 464 128
WIRE 64 176 64 144
WIRE 352 208 352 96
WIRE 576 208 576 96
WIRE 640 208 640 160
WIRE 720 208 720 160
WIRE 864 208 864 160
FLAG 96 16 control
IOPIN 96 16 Out
FLAG 64 176 0
FLAG 464 208 0
FLAG 576 208 0
FLAG 352 208 0
FLAG 352 16 control
IOPIN 352 16 In
FLAG 912 16 out
FLAG 720 208 0
FLAG 864 208 0
FLAG 640 208 0
SYMBOL voltage 64 48 R0
WINDOW 123 36 114 Left 0
WINDOW 39 0 0 Left 0
WINDOW 3 21 100 Left 0
SYMATTR Value {X}
SYMATTR InstName V1
SYMBOL Y_mult 464 64 R0
SYMATTR InstName U1
SYMBOL cap 448 144 R0
SYMATTR InstName Cref
SYMATTR Value 50p
SYMBOL ind 704 64 R0
SYMATTR InstName L1
SYMATTR Value 200µ
SYMBOL current 864 160 R180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
WINDOW 123 24 -28 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value ""
SYMATTR Value2 AC 1u
SYMBOL res 624 64 R0
SYMATTR InstName R1
SYMATTR Value 100k
TEXT 56 -336 Left 0 ;Test Of The Voltage Controlled Admittance Circuit: Variable Capacitor\n \nY = Vcontrol *Yref  = Vcontrol / Rref\n \nThis circuit requires Vcontrol > 0 Volt.
TEXT 48 -104 Left 0 !.param X=1\n.step param  X  1 10 .5
TEXT 46 -168 Left 0 !.ac lin 500 500k 2MEG