Version 4
SHEET 1 1052 680
WIRE 80 144 32 144
WIRE 176 144 80 144
WIRE 352 144 256 144
WIRE 384 144 352 144
WIRE 624 144 544 144
WIRE 704 144 624 144
WIRE 384 160 384 144
WIRE 704 160 704 144
WIRE 32 176 32 144
WIRE 544 176 544 144
WIRE 192 208 192 192
WIRE 240 224 240 192
WIRE 32 272 32 240
WIRE 384 272 384 240
WIRE 544 272 544 240
WIRE 704 272 704 240
WIRE 240 336 240 304
FLAG 192 208 0
FLAG 32 272 0
FLAG 240 336 0
FLAG 384 272 0
FLAG 80 144 vc1
FLAG 352 144 vr
FLAG 544 272 0
FLAG 704 272 0
FLAG 624 144 vc2
SYMBOL voltage 240 208 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PWL(0 0 1n 1)
SYMBOL sw 160 144 R270
WINDOW 0 39 2 VRight 0
WINDOW 3 44 85 VRight 0
SYMATTR InstName S1
SYMATTR Value SW1
SYMBOL cap 16 176 R0
SYMATTR InstName C1
SYMATTR Value 1µ IC=10
SYMBOL res 368 144 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL cap 528 176 R0
SYMATTR InstName C2
SYMATTR Value 1µ IC=10
SYMBOL res 688 144 R0
SYMATTR InstName R2
SYMATTR Value 1k
TEXT 16 -80 Left 0 !.tran 5m uic
TEXT 16 -40 Left 0 !.options plotwinsize=0
TEXT 16 -8 Left 0 !.model sw1 SW(Ron=1 Roff=10G Vt=0.5)
TEXT 16 -128 Left 0 ;The initial condition with IC in the capacitor requires "uic" in .tran