Version 4 SHEET 1 880 680 WIRE -128 -16 -176 -16 WIRE 0 -16 -64 -16 WIRE -176 80 -176 -16 WIRE -128 80 -176 80 WIRE 0 80 0 -16 WIRE 0 80 -48 80 WIRE 48 80 0 80 WIRE 176 80 128 80 WIRE -176 96 -176 80 WIRE 0 192 0 80 WIRE 32 192 0 192 WIRE 80 192 32 192 WIRE 176 208 176 80 WIRE 176 208 144 208 WIRE 224 208 176 208 WIRE -128 224 -176 224 WIRE 80 224 -128 224 WIRE -176 256 -176 224 WIRE -176 368 -176 336 FLAG -176 368 0 FLAG -176 96 0 FLAG 224 208 out FLAG -128 224 in FLAG 32 192 in- SYMBOL res 32 96 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 0 56 VBottom 0 SYMATTR InstName R1 SYMATTR Value 10k SYMBOL voltage -176 240 R0 WINDOW 123 24 132 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value PWL(0 0 1m 1 3m -1 4m 0) SYMATTR Value2 AC 1 SYMBOL res -144 96 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 0 56 VBottom 0 SYMATTR InstName R2 SYMATTR Value 10k SYMBOL cap -128 0 R270 WINDOW 0 32 32 VTop 0 WINDOW 3 0 32 VBottom 0 SYMATTR InstName C1 SYMATTR Value 1p SYMBOL ampsimp 112 144 R0 SYMATTR InstName U1 TEXT 336 16 Left 0 !.SUBCKT AMPSIMP 1 5 7\n* + - OUT\nRin 1 5 10G\nG1 0 4 1 5 100u\nR1 4 0 {GAIN/100u}\nC1 4 0 {1/(6.28*(GAIN/100u)*POLE)}\nE1 2 0 4 0 1\nRo 2 7 10\nVlow 3 0 DC={VLOW}\nVhigh 8 0 DC={VHIGH}\nDlow 3 4 DCLP\nDhigh 4 8 DCLP\n.MODEL DCLP D N=0.01\n.ENDS TEXT -432 0 Left 0 !.tran 5m TEXT -432 -40 Left 0 ;.ac dec 100 1 1e7 TEXT -56 -48 Left 0 ;Change C-value to 10 for AC open loop gain