Version 4 SHEET 1 2284 816 WIRE 352 256 384 256 WIRE 384 256 384 352 WIRE 384 256 432 256 WIRE 480 256 480 320 WIRE 480 384 480 400 WIRE 480 480 480 528 WIRE 480 528 384 528 WIRE 384 528 384 416 WIRE 240 352 240 256 WIRE 240 256 272 256 WIRE 384 528 240 528 WIRE 240 528 240 432 WIRE 784 256 832 256 WIRE 832 256 832 352 WIRE 480 528 656 528 WIRE 832 528 832 416 WIRE 832 256 880 256 WIRE 928 256 928 352 WIRE 832 528 928 528 WIRE 928 528 928 432 WIRE 480 256 528 256 WIRE 608 256 640 256 WIRE 656 352 656 256 WIRE 656 256 704 256 WIRE 656 432 656 528 WIRE 656 528 832 528 WIRE 240 544 240 528 WIRE 432 256 480 256 WIRE 640 256 656 256 WIRE 880 256 928 256 WIRE -208 432 -208 400 WIRE -208 400 -192 400 WIRE -208 512 -208 544 FLAG 240 544 0 FLAG 432 256 1 FLAG 640 256 2 FLAG 880 256 3 FLAG -192 400 D IOPIN -192 400 Out FLAG -208 544 0 SYMBOL ind 256 272 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 5 56 VBottom 0 SYMATTR InstName L1 SYMATTR Value 100µ SYMBOL ind 688 272 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 5 56 VBottom 0 SYMATTR InstName L2 SYMATTR Value 25µ SYMBOL cap 368 352 R0 SYMATTR InstName C1 SYMATTR Value 1µ SYMBOL cap 464 320 R0 WINDOW 0 41 30 Left 0 WINDOW 3 42 62 Left 0 SYMATTR InstName C2 SYMATTR Value 3.3µ SYMBOL cap 816 352 R0 SYMATTR InstName C3 SYMATTR Value 4µ SYMBOL voltage 240 336 R0 SYMATTR InstName V1 SYMATTR Value 10V SYMBOL res 464 384 R0 SYMATTR InstName R2 SYMATTR Value {n*6.3} SYMBOL bi 528 256 R270 WINDOW 0 32 40 VTop 0 WINDOW 3 -32 40 VBottom 0 SYMATTR InstName B1 SYMATTR Value I=V(D)*I(L2) SYMBOL bv 656 336 R0 SYMATTR InstName B2 SYMATTR Value V=V(D)*V(1) SYMBOL res 912 336 R0 SYMATTR InstName R3 SYMATTR Value 10 SYMBOL voltage -208 416 R0 WINDOW 123 24 132 Left 0 WINDOW 39 0 0 Left 0 WINDOW 0 39 57 Left 0 SYMATTR Value2 AC 1 SYMATTR InstName V2 SYMATTR Value PULSE(.5 1 1u 1u 1u .5m 1m) TEXT -208 272 Left 0 ;.ac dec 101 1k 100k TEXT -208 304 Left 0 !.param n=1 TEXT -208 328 Left 0 !.step dec param n .1 10 2 TEXT -200 -104 Left 0 ;Here is an interesting model of a simple buck switching regulator with an input filter that works for both \nac and transient runs. Duty cycle is defined by source V2. For a small signal ac analysis D (duty cycle) \nis set to its average value via the first term in the PULSE definition. For an averaged model transient \nanalysis this term may vary linearally between 0 and 1 volt. For a cycle-by-cycle transient analysis, D\nmay only switch rapidly between 0 and 1 volts. TEXT -200 48 Left 0 ;As R2, the damping resistor, is parametrically swept from small to large, its effect on the duty-cycle-to-\nouput transfer function can be observed by plotting the voltage on the output node, V(3). If the damping \nresistor strays too far from optimum, excessive phase shift occurs indicating that a pair of system poles \nhave migrated into the right half plane. This phase shift is unrecoverable and would likely induce \noscillations in a closed loop system. TEXT 368 -168 Center 0 ;ANALYZING SWITCHING REGULATORS (by analog@ieee.org) TEXT -208 248 Left 0 !.tran 3m TEXT -64 408 Center 0 ;note:\n.5 for .ac TEXT -184 608 Left 0 ;PULSE(0 1 2.5u 10n 10n 5u 10u) TEXT -40 696 Center 0 ;cut and paste for \ncycle-by-cycle analysis TEXT -184 576 Left 0 ;PULSE(.5 1 1u 1u 1u .5m 1m) TEXT 400 600 Center 0 ;cut and paste for \naveraged analysis LINE Normal -80 503 -70 455 LINE Normal -42 674 -32 626 LINE Normal 290 615 152 579 LINE Normal 289 620 289 620 LINE Normal 289 620 289 620