Index of /files/LTspiceIV/examples/LTspice_cmosedu/Ch8_MSD_LTspice
Name Last modified Size Description
Parent Directory -
_Fig8_12_MSD.plt 2020-05-17 09:16 298
_Fig8_1_MSD.plt 2020-05-17 09:16 317
_Fig8_4_MSD.plt 2020-05-17 09:16 327
_Fig8_6a_MSD.plt 2020-05-17 09:16 327
_Fig8_8a_MSD.plt 2020-05-17 09:16 327
inverter.asy 2020-05-17 09:16 376
switch_1.asy 2020-05-17 09:16 386
Ideal_ninverter.asy 2020-05-17 09:16 387
Ideal_inverter.asy 2020-05-17 09:16 416
op_amp.asy 2020-05-17 09:16 435
non_overlapping.asy 2020-05-17 09:16 439
Ideal_op_amp.asy 2020-05-17 09:16 440
2_bit_register.asc 2020-05-17 09:16 468
Ideal_op_amp.asc 2020-05-17 09:16 498
op_amp.asc 2020-05-17 09:16 498
_Fig8_5_MSD.plt 2020-05-17 09:16 534
_Fig8_6b_MSD.plt 2020-05-17 09:16 534
_Fig8_8b_MSD.plt 2020-05-17 09:16 534
Ideal_NAND_3.asy 2020-05-17 09:16 542
Sample_and_hold.asy 2020-05-17 09:16 549
Selectorbit.asy 2020-05-17 09:16 557
Ideal_comparator.asy 2020-05-17 09:16 558
_Fig8_11_MSD.plt 2020-05-17 09:16 560
_Fig8_14_MSD.plt 2020-05-17 09:16 567
_Fig8_16_MSD.plt 2020-05-17 09:16 567
_Fig8_19_MSD.plt 2020-05-17 09:16 593
switches_2.asy 2020-05-17 09:16 602
1_bit_averager.asc 2020-05-17 09:16 608
DFF.asy 2020-05-17 09:16 621
1_bit_2nd_PNS_mod_MSD.asy 2020-05-17 09:16 635
ADCbit.asy 2020-05-17 09:16 645
ADCbit_w_gain_error.asy 2020-05-17 09:16 647
Adderbit.asy 2020-05-17 09:16 647
_Fig8_17_MSD.plt 2020-05-17 09:16 655
1_bit_averager.asy 2020-05-17 09:16 659
Ideal_differential_op_amp.asy 2020-05-17 09:16 666
3_bit_register.asc 2020-05-17 09:16 669
Ideal_clocked_comparator.asy 2020-05-17 09:16 669
1_bit_2nd_ANS_mod_MSD.asy 2020-05-17 09:16 750
1_bit_1st_ANS_mod_MSD.asy 2020-05-17 09:16 751
1_bit_1st_PNS_mod_MSD.asy 2020-05-17 09:16 752
1_bit_2nd_PNS_SCmod_MSD.asy 2020-05-17 09:16 753
2_bit_register.asy 2020-05-17 09:16 771
switch_1.asc 2020-05-17 09:16 783
Ideal_differential_clocked_comparator.asy 2020-05-17 09:16 810
Ideal_4_bit_DAC.asy 2020-05-17 09:16 834
1_bit_1st_PNS_SC_MSD.asy 2020-05-17 09:16 870
1_bit_1st_PNS_SCmod_MSD.asy 2020-05-17 09:16 870
4_bit_register.asc 2020-05-17 09:16 874
Ideal_comparator.asc 2020-05-17 09:16 887
2_bit_averager.asy 2020-05-17 09:16 889
2_bit_comb_K_16.asy 2020-05-17 09:16 890
Ideal_4_bit_ADC.asy 2020-05-17 09:16 931
4_bit_adder.asc 2020-05-17 09:16 935
3_bit_register.asy 2020-05-17 09:16 1.0K
Ideal_ninverter.asc 2020-05-17 09:16 1.0K
inverter.asc 2020-05-17 09:16 1.0K
Ideal_inverter.asc 2020-05-17 09:16 1.0K
Selectorbit.asc 2020-05-17 09:16 1.0K
5_bit_register.asc 2020-05-17 09:16 1.0K
2_bit_averager.asc 2020-05-17 09:16 1.1K
3_bit_averager.asy 2020-05-17 09:16 1.1K
_Fig8_IQ_MSD.plt 2020-05-17 09:16 1.1K
Ideal_8_bit_DAC.asy 2020-05-17 09:16 1.2K
Ideal_clocked_comparator.asc 2020-05-17 09:16 1.2K
Ideal_differential_op_amp.asc 2020-05-17 09:16 1.2K
4_bit_register.asy 2020-05-17 09:16 1.2K
8_bit_inverter.asc 2020-05-17 09:16 1.2K
6_bit_register.asc 2020-05-17 09:16 1.2K
switches_2.asc 2020-05-17 09:16 1.3K
Ideal_8_bit_ADC.asy 2020-05-17 09:16 1.3K
Ideal_8_bit_ADC_w_gain_error.asy 2020-05-17 09:16 1.3K
4_bit_averager.asy 2020-05-17 09:16 1.3K
4_bit_comb_K_8.asy 2020-05-17 09:16 1.3K
4_bit_comb_K_16.asy 2020-05-17 09:16 1.3K
Ideal_10_bit_DAC.asy 2020-05-17 09:16 1.4K
_Fig8_1_MSD.asc 2020-05-17 09:16 1.4K
5_bit_register.asy 2020-05-17 09:16 1.4K
Ideal_10_bit_ADC.asy 2020-05-17 09:16 1.5K
3_bit_averager.asc 2020-05-17 09:16 1.5K
4_bit_averager.asc 2020-05-17 09:16 1.5K
Ideal_12_bit_DAC.asy 2020-05-17 09:16 1.5K
5_bit_averager.asy 2020-05-17 09:16 1.6K
5_bit_comb_K_16.asy 2020-05-17 09:16 1.6K
8_bit_selector.asc 2020-05-17 09:16 1.6K
8_bit_register.asc 2020-05-17 09:16 1.6K
8_bit_register_NOT.asc 2020-05-17 09:16 1.6K
Ideal_12_bit_ADC.asy 2020-05-17 09:16 1.7K
6_bit_register.asy 2020-05-17 09:16 1.7K
Sample_and_hold.asc 2020-05-17 09:16 1.7K
6_bit_averager.asy 2020-05-17 09:16 1.8K
6_bit_comb_K_16.asy 2020-05-17 09:16 1.8K
8_bit_adder.asc 2020-05-17 09:16 1.8K
4_bit_adder.asy 2020-05-17 09:16 1.8K
12_bit_inverter.asc 2020-05-17 09:16 1.8K
Ideal_differential_clocked_comparator.asc 2020-05-17 09:16 1.9K
5_bit_averager.asc 2020-05-17 09:16 1.9K
DFF.asc 2020-05-17 09:16 2.0K
non_overlapping.asc 2020-05-17 09:16 2.0K
7_bit_averager.asy 2020-05-17 09:16 2.0K
8_bit_inverter.asy 2020-05-17 09:16 2.0K
Ideal_NAND_3.asc 2020-05-17 09:16 2.1K
8_bit_integrator.asy 2020-05-17 09:16 2.1K
fsby4_resonator_8bit.asy 2020-05-17 09:16 2.1K
8_bit_register.asy 2020-05-17 09:16 2.1K
8_bit_integrator.asc 2020-05-17 09:16 2.1K
8_bit_register_NOT.asy 2020-05-17 09:16 2.2K
ADCbit.asc 2020-05-17 09:16 2.2K
ADCbit_w_gain_error.asc 2020-05-17 09:16 2.2K
Ideal_4_bit_ADC.asc 2020-05-17 09:16 2.2K
8_bit_averager.asy 2020-05-17 09:16 2.3K
8_bit_comb_K_1.asy 2020-05-17 09:16 2.3K
8_bit_comb_K_3.asy 2020-05-17 09:16 2.3K
8_bit_comb_K_4.asy 2020-05-17 09:16 2.3K
8_bit_comb_K_8.asy 2020-05-17 09:16 2.3K
8_bit_comb_K_16.asy 2020-05-17 09:16 2.3K
12_bit_register.asc 2020-05-17 09:16 2.3K
12_bit_register_NOT.asc 2020-05-17 09:16 2.3K
12_bit_Accumulator.asc 2020-05-17 09:16 2.3K
6_bit_averager.asc 2020-05-17 09:16 2.4K
12_bit_selector.asc 2020-05-17 09:16 2.4K
12_bit_averager.asc 2020-05-17 09:16 2.5K
_Fig8_4_MSD.asc 2020-05-17 09:16 2.5K
7_bit_averager.asc 2020-05-17 09:16 2.6K
12_bit_adder.asc 2020-05-17 09:16 2.6K
fsby4_resonator_8bit.asc 2020-05-17 09:16 2.6K
Integrator_non_delaying.asy 2020-05-17 09:16 2.6K
Integrator_delaying.asy 2020-05-17 09:16 2.6K
8_bit_averager.asc 2020-05-17 09:16 2.6K
_Fig8_6a_MSD.asc 2020-05-17 09:16 2.7K
_Fig8_5_MSD.asc 2020-05-17 09:16 2.7K
_Fig8_6b_MSD.asc 2020-05-17 09:16 2.8K
12_bit_inverter.asy 2020-05-17 09:16 3.0K
Ideal_8_bit_ADC.asc 2020-05-17 09:16 3.0K
12_bit_integrator.asy 2020-05-17 09:16 3.1K
fsby4_resonator_12bit.asy 2020-05-17 09:16 3.1K
12_bit_Accumulator.asy 2020-05-17 09:16 3.1K
12_bit_register.asy 2020-05-17 09:16 3.1K
12_bit_register_NOT.asy 2020-05-17 09:16 3.1K
Ideal_8_bit_ADC_w_gain_error.asc 2020-05-17 09:16 3.1K
8_bit_selector.asy 2020-05-17 09:16 3.1K
4_bit_comb_K_8.asc 2020-05-17 09:16 3.1K
12_bit_integrator.asc 2020-05-17 09:16 3.2K
12_bit_comb_K_1.asy 2020-05-17 09:16 3.2K
12_bit_comb_K_8.asy 2020-05-17 09:16 3.2K
12_bit_averager.asy 2020-05-17 09:16 3.2K
8_bit_adder.asy 2020-05-17 09:16 3.2K
Integrator_non_delaying.asc 2020-05-17 09:16 3.2K
_Fig8_8a_MSD.asc 2020-05-17 09:16 3.3K
Integrator_delaying.asc 2020-05-17 09:16 3.3K
8_bit_comb_K_1.asc 2020-05-17 09:16 3.3K
Ideal_10_bit_ADC.asc 2020-05-17 09:16 3.5K
8_bit_comb_K_3.asc 2020-05-17 09:16 3.5K
_Fig8_8b_MSD.asc 2020-05-17 09:16 3.5K
fsby4_resonator_12bit.asc 2020-05-17 09:16 3.6K
Ideal_12_bit_ADC.asc 2020-05-17 09:16 3.8K
8_bit_comb_K_4.asc 2020-05-17 09:16 3.9K
16_bit_integrator.asy 2020-05-17 09:16 4.0K
Ideal_4_bit_DAC.asc 2020-05-17 09:16 4.0K
16_bit_integrator.asc 2020-05-17 09:16 4.3K
_Fig8_12_MSD.asc 2020-05-17 09:16 4.3K
12_bit_selector.asy 2020-05-17 09:16 4.5K
_Fig8_11_MSD.asc 2020-05-17 09:16 4.6K
12_bit_adder.asy 2020-05-17 09:16 4.6K
4_bit_comb_K_16.asc 2020-05-17 09:16 4.9K
12_bit_comb_K_1.asc 2020-05-17 09:16 4.9K
8_bit_comb_K_8.asc 2020-05-17 09:16 5.1K
2_bit_comb_K_16.asc 2020-05-17 09:16 5.9K
12_bit_comb_K_8.asc 2020-05-17 09:16 6.9K
Ideal_8_bit_DAC.asc 2020-05-17 09:16 7.1K
5_bit_comb_K_16.asc 2020-05-17 09:16 7.3K
8_bit_comb_K_16.asc 2020-05-17 09:16 7.9K
Ideal_10_bit_DAC.asc 2020-05-17 09:16 8.6K
Adderbit.asc 2020-05-17 09:16 8.9K
_Fig8_14_MSD.asc 2020-05-17 09:16 9.8K
Ideal_12_bit_DAC.asc 2020-05-17 09:16 10K
6_bit_comb_K_16.asc 2020-05-17 09:16 10K
_Fig8_17_MSD.asc 2020-05-17 09:16 16K
_Fig8_16_MSD.asc 2020-05-17 09:16 16K
_Fig8_19_MSD.asc 2020-05-17 09:16 19K
_Fig8_IQ_MSD.asc 2020-05-17 09:16 20K