# EMI Modelling using LTspice Hints

For SMPS applications I have successfully used LTspice to design EMI filters, but I always start out by running an ac simulation rather than the much more time consuming time domain simulation followed by an fft. This is done by substituting frequency dependent B-source(s) for the transistors/ diodes at the place in your circuit where the rectangular switching waveforms would be during a transient run. The B-source can be made to approximate the peaks of sin(x)/x sort of spectrum you would see in an fft of a repetitive pulse with limited transition times (your switching waveform minus the ringing).

Here is the netlist snippet for the EMI current injected into the first capacitor of the input filter in a buck type design:

V1 1V 0 AC 1

E1 LIM 0 FREQ {V(1V)*1} ( 500k, 66, 0) (501k, 60, 0)

B1 EMI 0 I=Gain/1uV*V(1V) laplace=1/((1+s/{P1})*(1+s/{P2}))

.param Vdc=300 Idc=1.3 f=100kHz tr=60n d=.4

.param Gain={2*Idc*d} P1={2*f/d} P2={2/tr}

V1 sets up a unity (0dB) reference both for generating the limit line (in E1) and the EMI shaped by the Laplace source, B1. The poles for the Laplace statement depend on the amplitude, frequency, duty cycle and rise time of the switching waveform (as defined in the parameter statements). In real life your circuit's EMI source will almost always have additional ringing in the time domain that will generate several resonant peaks beyond the simple pulse frequency domain envelope approximation given above (but it is a good start).

You can check the validity of this approximation by comparing it to an fft of a pulse source set up matching the parameters. Bear in mind that any SMPS switching cell invariably injects pulses of current into the capacitor on its one end and pulses of voltage into the inductor on its other side. If you poke around on the net you might find one of the several papers justifying and explaining this technique in detail.

Differential mode EMI results directly from the switching action and can be well simulated by replacing the switching cell with their equivalent sources as described above. However, the source of common mode EMI is not so straightforward and will probably require several guesses and/or measurements of various key stray capacitances between EMI "hot" nodes and chassis (PE). The most common critical points are switching transistor-to-heatsink mounting capacitance and transformer primary-to-secondary interwinding capacitance.

It is very easy to make good models of your LISNs in LTspice and you will have to model the line cord as loosely coupled inductors. Depending on the specified test setup (i.e, whether your test unit is bonded directly to the testing ground plane or sitting a specified distance above) you may need to add into your simulation a few chassis-to-ground plane capacitors (usually tens of pFs). These can be responsible for some nasty common resonances in the upper MHz range.

One last caveat: be sure to make use of LTspice's unique ability to accept realistic parasitics (ESR, ESL, etc.) into the definition of the capacitors and inductors in your EMI simulation circuit model. Fill them all in even if you have to guess. EMI suppression film capacitors typically have ESLs of 10nH to 50nH and ESRs of 3m to 30m ohms.

Good luck to all -- analogspiceman