Filter Pages and LTspice Goodies
Introduction
The following links contain macro models built for LTspice with the purpose of turning large-scale simulations into block-level schematics, similar to hierarchy design but with predefined models. The domains of interest include, but are not limited to, power electronics ([Pwr]), digital devices ([0101]), mathematics equations ([Math]), filtering and control theory ([Filt]). In addition, there is one more model, Filter, that is made to be a sort of a universal filter for LTspice. The links go to an external site, for now, until I fully merge all the pages to blend in with LTwiki. The lists describing the contents of every folder is limited to enumeration and a simple description, details are in the links.
This folder holds the following:
ADC16 |
an asynchronous (max) 16bit ADC |
Bin2Dec |
a binary to decimal translator |
CNT16asy |
an asynchronous (max) 16bit counter |
DAC16 |
a (max) 16bit DAC |
Dec2Bin |
a decimal to binary translator |
JKFLOP |
a behavioural JK flip-flop |
[Filt]
The contents of this folder is mixed filtering and control theory.
AGC |
an automatic gain controller w/out external frequency control | ||||||||
DeadTime |
dead-time | ||||||||
DeadZone |
dead-zone | ||||||||
Delay |
analog -- exp(-sT) -- or digital -- z-1 -- delay
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Diff |
differentiator | ||||||||
FFT |
actually a continuous-time Fourier decomposition, but FFT is shorter
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Filter |
a universal filter, separate | FreqDet |
frequency detector | Gain |
a linear/dB gain/buffer with variable output resistance | Integ_r |
resettable integrator w/out external period control | LeadLag, LeadLag2 |
two versions for a <-π..π> lead-lag control, w/out external control
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